[x265] [PATCH Review only] asm: chroma_vpp[4x4] for colorspace i420 in avx2: improve 228c->184c
chen
chenm003 at 163.com
Wed Dec 3 17:25:35 CET 2014
At 2014-12-03 20:30:29,"Divya Manivannan" <divya at multicorewareinc.com> wrote:
># HG changeset patch
># User Divya Manivannan <divya at multicorewareinc.com>
># Date 1417609764 -19800
># Wed Dec 03 17:59:24 2014 +0530
># Node ID 7c8113f91383fde575166366f67eea855b0ecf6e
># Parent de54cffaecf2c505aef34d34063f9840036dae56
>asm: chroma_vpp[4x4] for colorspace i420 in avx2: improve 228c->184c
>
>diff -r de54cffaecf2 -r 7c8113f91383 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Tue Dec 02 12:36:41 2014 -0600
>+++ b/source/common/x86/asm-primitives.cpp Wed Dec 03 17:59:24 2014 +0530
>@@ -1879,6 +1879,8 @@
> p.luma_vpp[LUMA_8x8] = x265_interp_8tap_vert_pp_8x8_avx2;
> p.luma_vpp[LUMA_8x16] = x265_interp_8tap_vert_pp_8x16_avx2;
> p.luma_vpp[LUMA_8x32] = x265_interp_8tap_vert_pp_8x32_avx2;
>+
>+ p.chroma[X265_CSP_I420].filter_vpp[CHROMA_4x4] = x265_interp_4tap_vert_pp_4x4_avx2;
> }
> #endif // if HIGH_BIT_DEPTH
> }
>diff -r de54cffaecf2 -r 7c8113f91383 source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm Tue Dec 02 12:36:41 2014 -0600
>+++ b/source/common/x86/ipfilter8.asm Wed Dec 03 17:59:24 2014 +0530
>@@ -31,6 +31,11 @@
> db 4, 5, 6, 7, 5, 6, 7, 8, 6, 7, 8, 9, 7, 8, 9, 10
> db 8, 9,10,11, 9,10,11,12,10,11,12,13,11,12,13, 14
>
>+ALIGN 32
>+const tab_vpp_4x4, times 2 db 0, 4, 1, 5, 2, 6, 3, 7, 8, 12, 9, 13, 10, 14, 11, 15
please rename to more clear one.
>+const tab_vpp_shufb_4x4, dd 0, 1, 1, 2, 2, 3, 3, 4
>+ dd 2, 3, 3, 4, 4, 5, 5, 6
>+
> ALIGN 32
> tab_Lm: db 0, 1, 2, 3, 4, 5, 6, 7, 1, 2, 3, 4, 5, 6, 7, 8
> db 2, 3, 4, 5, 6, 7, 8, 9, 3, 4, 5, 6, 7, 8, 9, 10
>@@ -143,6 +148,31 @@
> times 16 db 58, -10
> times 16 db 4, -1
>
>+ALIGN 32
>+tab_ChromaCoeffVer_32: times 16 db 0, 64
>+ times 16 db 0, 0
>+
>+ times 16 db -2, 58
>+ times 16 db 10, -2
>+
>+ times 16 db -4, 54
>+ times 16 db 16, -2
>+
>+ times 16 db -6, 46
>+ times 16 db 28, -4
>+
>+ times 16 db -4, 36
>+ times 16 db 36, -4
>+
>+ times 16 db -4, 28
>+ times 16 db 46, -6
>+
>+ times 16 db -2, 16
>+ times 16 db 54, -4
>+
>+ times 16 db -2, 10
>+ times 16 db 58, -2
>+
> tab_c_64_n64: times 8 db 64, -64
>
> const interp4_shuf, times 2 db 0, 1, 8, 9, 4, 5, 12, 13, 2, 3, 10, 11, 6, 7, 14, 15
>@@ -1901,6 +1931,54 @@
>
> RET
>
>+INIT_YMM avx2
>+IACA_START
>+ALIGN 32
for debug only, please remove debug code in final patch.
>+cglobal interp_4tap_vert_pp_4x4, 4, 6, 3
>+ mov r4d, r4m
>+ shl r4d, 6
>+ sub r0, r1
>+
>+%ifdef PIC
>+ lea r5, [tab_ChromaCoeffVer_32]
>+ add r5, r4
>+%else
>+ lea r5, [tab_ChromaCoeffVer_32 + r4]
>+%endif
>+
>+ lea r4, [r1 * 3]
>+
>+ movd xm1, [r0]
>+ pinsrd xm1, [r0 + r1], 1
>+ pinsrd xm1, [r0 + r1 * 2], 2
>+ pinsrd xm1, [r0 + r4], 3 ; m1 = row[3 2 1 0]
>+ lea r0, [r0 + r1 * 4]
>+ movd xm2, [r0]
>+ pinsrd xm2, [r0 + r1], 1
>+ pinsrd xm2, [r0 + r1 * 2], 2 ; m2 = row[x 6 5 4]
>+ vinserti128 m1, m1, xm2, 1 ; m1 = row[x 6 5 4 3 2 1 0]
>+ mova m2, [tab_vpp_shufb_4x4]
>+ vpermd m0, m2, m1 ; m0 = row[4 3 3 2 2 1 1 0]
>+ mova m2, [tab_vpp_shufb_4x4 + mmsize]
>+ vpermd m1, m2, m1 ; m1 = row[6 5 5 4 4 3 3 2]
>+
>+ mova m2, [tab_vpp_4x4]
>+ pshufb m0, m0, m2
>+ pshufb m1, m1, m2
>+ pmaddubsw m0, [r5]
>+ pmaddubsw m1, [r5 + mmsize]
>+ paddw m0, m1 ; m0 = WORD ROW[3 2 1 0]
>+ pmulhrsw m0, [pw_512]
>+ vextracti128 xm1, m0, 1
>+ packuswb xm0, xm1
>+ lea r5, [r3 * 3]
>+ movd [r2], xm0
>+ pextrd [r2 + r3], xm0, 1
>+ pextrd [r2 + r3 * 2], xm0, 2
>+ pextrd [r2 + r5], xm0, 3
>+ RET
>+IACA_END
>+
> ;-----------------------------------------------------------------------------
> ; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
> ;-----------------------------------------------------------------------------
>diff -r de54cffaecf2 -r 7c8113f91383 source/common/x86/ipfilter8.h
>--- a/source/common/x86/ipfilter8.h Tue Dec 02 12:36:41 2014 -0600
>+++ b/source/common/x86/ipfilter8.h Wed Dec 03 17:59:24 2014 +0530
>@@ -573,6 +573,7 @@
> SETUP_CHROMA_SS_FUNC_DEF(16, 64, cpu);
>
> CHROMA_FILTERS(_sse4);
>+CHROMA_FILTERS(_avx2);
> CHROMA_SP_FILTERS(_sse2);
> CHROMA_SP_FILTERS_SSE4(_sse4);
> CHROMA_SS_FILTERS(_sse2);
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