[x265] [PATCH] asm: chroma_hpp[16x16] for colorspace i420 in avx2 improve 1540c->1000c
chen
chenm003 at 163.com
Tue Dec 9 20:35:41 CET 2014
At 2014-12-09 17:45:56,aasaipriya at multicorewareinc.com wrote:
># HG changeset patch
># User Aasaipriya Chandran aasaipriya at multicorewareinc.com>
># Date 1418118314 -19800
># Tue Dec 09 15:15:14 2014 +0530
># Node ID 82622d89fe00d58da4e61740ad80f5cd43b4a607
># Parent 680279f6c90e9dff83624264b24a3577aa48e638
>asm: chroma_hpp[16x16] for colorspace i420 in avx2 improve 1540c->1000c
>
diff -r 680279f6c90e -r 82622d89fe00 source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm Tue Dec 09 12:58:28 2014 +0530
>+++ b/source/common/x86/ipfilter8.asm Tue Dec 09 15:15:14 2014 +0530
>@@ -1455,6 +1455,67 @@
> pextrd [r2+r0], xm3, 3
> RET
>
>+
>+INIT_YMM avx2
>+cglobal interp_4tap_horiz_pp_16x16, 4,6,6
>+ mov r4d, r4m
>+
>+%ifdef PIC
>+ lea r5, [tab_ChromaCoeff]
>+ vpbroadcastd m0, [r5 + r4 * 4]
>+%else
>+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 4]
>+%endif
>+
>+ movu m1, [tab_Tm]
constant is aligned
>+ vpbroadcastd m2, [pw_1]
>+
>+ ; register map
>+ ; m0 - interpolate coeff
>+ ; m1 - shuffle order table
>+ ; m2 - constant word 1
>+
>+ sub r0, 1
>+ mov r4d, 8
>+
>+.loop:
>+ ; Row 0
>+ vbroadcasti128 m3, [r0] ; [x x x x x A 9 8 7 6 5 4 3 2 1 0]
>+ pshufb m3, m1
>+ pmaddubsw m3, m0
>+ pmaddwd m3, m2
>+ vbroadcasti128 m4, [r0 + 8] ; [x x x x x A 9 8 7 6 5 4 3 2 1 0]
>+ pshufb m4, m1
>+ pmaddubsw m4, m0
>+ pmaddwd m4, m2
>+ packssdw m3, m4
>+ pmulhrsw m3, [pw_512]
we have more free register, why not buffer it?
>+
>+ ; Row 1
>+ vbroadcasti128 m4, [r0 + r1] ; [x x x x x A 9 8 7 6 5 4 3 2 1 0]
>+ pshufb m4, m1
>+ pmaddubsw m4, m0
>+ pmaddwd m4, m2
>+ vbroadcasti128 m5, [r0 + r1 + 8] ; [x x x x x A 9 8 7 6 5 4 3 2 1 0]
>+ pshufb m5, m1
>+ pmaddubsw m5, m0
>+ pmaddwd m5, m2
>+ packssdw m4, m5
>+ pmulhrsw m4, [pw_512]
>+ packuswb m3, m4
>+ mova m5, [interp_4tap_8x8_horiz_shuf]
>+ vpermd m3, m5, m3
>+ vextracti128 xm4, m3, 1
>+
>+ movu [r2], xm3
>+ movu [r2 + r3], xm4
>+ lea r2, [r2 + r3 * 2]
>+ lea r0, [r0 + r1 * 2]
>+ dec r4d
>+ jnz .loop
>+ RET
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