[x265] [PATCH] asm: code for intra_pred[BLOCK_16x16] mode 2 and 34
chen
chenm003 at 163.com
Wed Jan 8 17:54:04 CET 2014
>diff -r c4edab8dab65 -r 49cfed20055f source/common/x86/intrapred8.asm
>--- a/source/common/x86/intrapred8.asm Tue Jan 07 18:36:17 2014 +0530
>+++ b/source/common/x86/intrapred8.asm Wed Jan 08 19:03:49 2014 +0530
>@@ -1107,6 +1107,86 @@
> RET
>
> ;-----------------------------------------------------------------------------
>+; void intraPredAng(pixel* dst, intptr_t dstStride, pixel *refLeft, pixel *refAbove, int dirMode, int bFilter)
>+;-----------------------------------------------------------------------------
>+INIT_XMM ssse3
>+cglobal intra_pred_ang16_2, 3,3,5
>+ cmp r4m, byte 34
>+ cmove r2, r3mp
>+ movu m0, [r2 + 2]
>+ movu m1, [r2 + 18]
>+ movu [r0], m0
>+ punpckhqdq m2, m0, m0
>+ punpcklqdq m2, m1
>+ palignr m3, m0, 1
>+ palignr m4, m2, 1
>+ punpcklqdq m3, m4
>+ movu [r0 + r1], m3
palignr m3, m1, m0, 1
>+ lea r0, [r0 + r1 * 2]
>+ palignr m3, m0, 2
>+ palignr m4, m2, 2
>+ punpcklqdq m3, m4
>+ movu [r0], m3
>+ palignr m3, m0, 3
>+ palignr m4, m2, 3
>+ punpcklqdq m3, m4
>+ movu [r0 + r1], m3
>+ lea r0, [r0 + r1 * 2]
>+ palignr m3, m0, 4
>+ palignr m4, m2, 4
>+ punpcklqdq m3, m4
>+ movu [r0], m3
>+ palignr m3, m0, 5
>+ palignr m4, m2, 5
>+ punpcklqdq m3, m4
>+ movu [r0 + r1], m3
>+ lea r0, [r0 + r1 * 2]
>+ palignr m3, m0, 6
>+ palignr m4, m2, 6
>+ punpcklqdq m3, m4
>+ movu [r0], m3
>+ palignr m3, m0, 7
>+ palignr m4, m2, 7
>+ punpcklqdq m3, m4
>+ movu [r0 + r1], m3
>+ lea r0, [r0 + r1 * 2]
>+ palignr m0, m3, 1
>+ punpcklqdq m0, m1
>+ movu [r0], m0
>+ palignr m0, m3, 2
>+ palignr m2, m1, 1
>+ punpcklqdq m0, m2
>+ movu [r0 + r1], m0
>+ lea r0, [r0 + r1 * 2]
>+ palignr m0, m3, 3
>+ palignr m2, m1, 2
>+ punpcklqdq m0, m2
>+ movu [r0], m0
>+ palignr m0, m3, 4
>+ palignr m2, m1, 3
>+ punpcklqdq m0, m2
>+ movu [r0 + r1], m0
>+ lea r0, [r0 + r1 * 2]
>+ palignr m0, m3, 5
>+ palignr m2, m1, 4
>+ punpcklqdq m0, m2
>+ movu [r0], m0
>+ palignr m0, m3, 6
>+ palignr m2, m1, 5
>+ punpcklqdq m0, m2
>+ movu [r0 + r1], m0
>+ lea r0, [r0 + r1 * 2]
>+ palignr m0, m3, 7
>+ palignr m2, m1, 6
>+ punpcklqdq m0, m2
>+ movu [r0], m0
>+ palignr m0, m3, 8
>+ palignr m2, m1, 7
>+ punpcklqdq m0, m2
>+ movu [r0 + r1], m0
>+ RET
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