[x265] [PATCH] asm: code for intra_pred[BLOCK_16x16] mode 3
murugan at multicorewareinc.com
murugan at multicorewareinc.com
Fri Jan 17 05:44:20 CET 2014
# HG changeset patch
# User Murugan Vairavel <murugan at multicorewareinc.com>
# Date 1389933805 -19800
# Fri Jan 17 10:13:25 2014 +0530
# Node ID 634ea20a6b7283c62c5b83b158e080145e9e81c6
# Parent 3d747041271fad0f9984445882368539e46cd377
asm: code for intra_pred[BLOCK_16x16] mode 3
diff -r 3d747041271f -r 634ea20a6b72 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Jan 16 20:08:45 2014 -0600
+++ b/source/common/x86/asm-primitives.cpp Fri Jan 17 10:13:25 2014 +0530
@@ -1006,6 +1006,8 @@
SETUP_INTRA_ANG4(32, 4, sse4);
SETUP_INTRA_ANG4(33, 3, sse4);
+ SETUP_INTRA_ANG16(3, 3, sse4);
+
p.dct[DCT_8x8] = x265_dct8_sse4;
}
if (cpuMask & X265_CPU_AVX)
diff -r 3d747041271f -r 634ea20a6b72 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Thu Jan 16 20:08:45 2014 -0600
+++ b/source/common/x86/intrapred8.asm Fri Jan 17 10:13:25 2014 +0530
@@ -1182,6 +1182,174 @@
movu [r0 + r1], m2
RET
+%macro TRANSPOSE_STORE_8x8 0
+ punpckhbw m0, m4, m5
+ punpcklbw m4, m5
+ punpckhbw m2, m4, m0
+ punpcklbw m4, m0
+
+ punpckhbw m0, m6, m1
+ punpcklbw m6, m1
+ punpckhbw m1, m6, m0
+ punpcklbw m6, m0
+
+ punpckhdq m5, m4, m6
+ punpckldq m4, m6
+ punpckldq m6, m2, m1
+ punpckhdq m2, m1
+ mova m1, m2
+
+ movh [r0], m4
+ movhps [r0 + r1], m4
+ movh [r0 + r1 * 2], m5
+ movhps [r0 + r4], m5
+ lea r0, [r0 + r1 * 4]
+ movh [r0], m6
+ movhps [r0 + r1], m6
+ movh [r0 + r1 * 2], m1
+ movhps [r0 + r4], m1
+%endmacro
+
+INIT_XMM sse4
+cglobal intra_pred_ang16_3, 3,7,8
+
+ lea r3, [ang_table + 16 * 16]
+ lea r4, [r1 * 3]
+ mov r5, r0
+ mov r6d, 2
+ mova m7, [pw_1024]
+
+.top:
+ movu m0, [r2 + 1]
+ palignr m1, m0, 1
+
+ punpckhbw m2, m0, m1
+ punpcklbw m0, m1
+ palignr m1, m2, m0, 2
+
+ movu m3, [r3 + 10 * 16] ; [26]
+ movu m6, [r3 + 4 * 16] ; [20]
+
+ pmaddubsw m4, m0, m3
+ pmulhrsw m4, m7
+ pmaddubsw m1, m6
+ pmulhrsw m1, m7
+ packuswb m4, m1
+
+ palignr m5, m2, m0, 4
+
+ movu m3, [r3 - 2 * 16] ; [14]
+ pmaddubsw m5, m3
+ pmulhrsw m5, m7
+
+ palignr m6, m2, m0, 6
+
+ movu m3, [r3 - 8 * 16] ; [ 8]
+ pmaddubsw m6, m3
+ pmulhrsw m6, m7
+ packuswb m5, m6
+
+ palignr m1, m2, m0, 8
+
+ movu m3, [r3 - 14 * 16] ; [ 2]
+ pmaddubsw m6, m1, m3
+ pmulhrsw m6, m7
+
+ movu m3, [r3 + 12 * 16] ; [28]
+ pmaddubsw m1, m3
+ pmulhrsw m1, m7
+ packuswb m6, m1
+
+ palignr m1, m2, m0, 10
+
+ movu m3, [r3 + 6 * 16] ; [22]
+ pmaddubsw m1, m3
+ pmulhrsw m1, m7
+
+ palignr m2, m0, 12
+
+ movu m3, [r3] ; [16]
+ pmaddubsw m2, m3
+ pmulhrsw m2, m7
+ packuswb m1, m2
+
+ TRANSPOSE_STORE_8x8
+
+ dec r6d
+ jz .skip
+ lea r2, [r2 + 8]
+ lea r0, [r0 + r1 * 4]
+ jmp .top
+
+.skip:
+ mov r6d, 2
+ lea r0, [r5 + 8]
+
+.bottom:
+
+ movu m0, [r2]
+ palignr m1, m0, 1
+
+ punpckhbw m2, m0, m1
+ punpcklbw m0, m1
+ palignr m5, m2, m0, 2
+
+ movu m3, [r3 - 6 * 16] ; [10]
+ movu m6, [r3 - 12 * 16] ; [04]
+
+ pmaddubsw m4, m0, m3
+ pmulhrsw m4, m7
+ pmaddubsw m1, m5, m6
+ pmulhrsw m1, m7
+ packuswb m4, m1
+
+ movu m3, [r3 + 14 * 16] ; [30]
+ pmaddubsw m5, m3
+ pmulhrsw m5, m7
+
+ palignr m6, m2, m0, 4
+
+ movu m3, [r3 + 8 * 16] ; [24]
+ pmaddubsw m6, m3
+ pmulhrsw m6, m7
+ packuswb m5, m6
+
+ palignr m1, m2, m0, 6
+
+ movu m3, [r3 + 2 * 16] ; [18]
+ pmaddubsw m6, m1, m3
+ pmulhrsw m6, m7
+
+ palignr m1, m2, m0, 8
+
+ movu m3, [r3 - 4 * 16] ; [12]
+ pmaddubsw m1, m3
+ pmulhrsw m1, m7
+ packuswb m6, m1
+
+ palignr m1, m2, m0, 10
+
+ movu m3, [r3 - 10 * 16] ; [06]
+ pmaddubsw m1, m3
+ pmulhrsw m1, m7
+
+ palignr m2, m0, 12
+
+ movu m3, [r3 - 16 * 16] ; [0]
+ pmaddubsw m2, m3
+ pmulhrsw m2, m7
+ packuswb m1, m2
+
+ TRANSPOSE_STORE_8x8
+
+ dec r6d
+ jz .end
+ lea r2, [r2 + 8]
+ lea r0, [r0 + r1 * 4]
+ jmp .bottom
+.end:
+ RET
+
;-----------------------------------------------------------------------------
; void all_angs_pred_4x4(pixel *dest, pixel *above0, pixel *left0, pixel *above1, pixel *left1, bool bLuma)
;-----------------------------------------------------------------------------
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