[x265] [PATCH] asm: avx2 asm code for 8bpp and 16bpp vesion of scale1D_128to64 module

[chen]

At 2014-10-20 22:24:40,murugan at multicorewareinc.com wrote:
># HG changeset patch
># User Murugan Vairavel murugan at multicorewareinc.com>
># Date 1413814135 -19800
>#      Mon Oct 20 19:38:55 2014 +0530
># Node ID 209386a43ffd9d0db2fb84f9f27f660492f724b8
># Parent  7eab67ffff81a44cc67c388dc4fcae2468979fae
>asm: avx2 asm code for 8bpp and 16bpp vesion of scale1D_128to64 module
>
>diff -r 7eab67ffff81 -r 209386a43ffd source/common/x86/pixel-util8.asm
>--- a/source/common/x86/pixel-util8.asm	Mon Oct 20 15:37:50 2014 +0530
>+++ b/source/common/x86/pixel-util8.asm	Mon Oct 20 19:38:55 2014 +0530
>@@ -42,13 +42,15 @@
> mask_ff:   times 16 db 0xff
>            times 16 db 0
> deinterleave_shuf: db 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15
>-deinterleave_word_shuf: db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 15, 15
>+deinterleave_word_shuf: db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15
> hmul_16p:  times 16 db 1
>            times 8 db 1, -1
> hmulw_16p:  times 8 dw 1
>             times 4 dw 1, -1
> 
> trans8_shuf: dd 0, 4, 1, 5, 2, 6, 3, 7
>+scale1D_shuf: times 2 db 0, 2, 4, 6, 8, 10, 12, 14, 1, 3, 5, 7, 9, 11, 13, 15
>+scale1D_shuf_word: times 2 db 0, 1, 4, 5, 8, 9, 12, 13, 2, 3, 6, 7, 10, 11, 14, 15
> 
> SECTION .text
> 
>@@ -3451,6 +3453,75 @@
> %endif
> RET
> 
>+INIT_YMM avx2

put this head before every cglobal to get more readable
>+%if HIGH_BIT_DEPTH == 1
>+cglobal scale1D_128to64, 2, 2, 4
>+    mova            m3, [scale1D_shuf_word]

vpbroadcasti128 may save half of const memory
>+    movu            m0, [r1]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 32]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1
>+    pavgw           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0], m0
>+
>+    movu            m0, [r1 + 64]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 96]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1
>+    pavgw           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0 + 32], m0
>+
>+    movu            m0, [r1 + 128]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 160]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1
>+    pavgw           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0 + 64], m0
>+
>+    movu            m0, [r1 + 192]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 224]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1
>+    pavgw           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0 + 96], m0
>+    RET
>+%else ; HIGH_BIT_DEPTH == 0
>+cglobal scale1D_128to64, 2, 2, 4
>+    mova            m3, [scale1D_shuf]
>+    movu            m0, [r1]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 32]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1

in AVX2 version, we can test new algorithm, how about pmaddubsw + pavgw + packuswb? it reduce some Port5 operators.
>+    pavgb           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0], m0
>+
>+    movu            m0, [r1 + 64]
>+    pshufb          m0, m0, m3
>+    movu            m1, [r1 + 96]
>+    pshufb          m1, m1, m3
>+    punpcklqdq      m2, m0, m1
>+    punpckhqdq      m0, m1
>+    pavgb           m0, m2
>+    vpermq          m0, m0, 0xD8
>+    movu            [r0 + 32], m0
>+    RET
>+%endif
>+
> ;-----------------------------------------------------------------
> ; void scale2D_64to32(pixel *dst, pixel *src, intptr_t stride)
> ;-----------------------------------------------------------------
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