[x265] [PATCH] disable old interface SSE asm code, will be enabled after modification as per new interface

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1414496512 -19800
# Node ID 1371d3e0f06331e5d01d74201846b66c1f4cc16b
# Parent  91cb96595a4b74addda32d543802cde9e9da6dfd
disable old interface SSE asm code, will be enabled after modification as per new interface

diff -r 91cb96595a4b -r 1371d3e0f063 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Tue Oct 28 16:48:27 2014 +0530
+++ b/source/common/x86/asm-primitives.cpp	Tue Oct 28 17:11:52 2014 +0530
@@ -1336,7 +1336,7 @@
         p.sad_x4[LUMA_16x4] = x265_pixel_sad_x4_16x4_sse2;
         p.sad_x4[LUMA_12x16] = x265_pixel_sad_x4_12x16_mmx2;
 
-        p.cvt32to16_shr = x265_cvt32to16_shr_sse2;
+//        p.cvt32to16_shr = x265_cvt32to16_shr_sse2;
         p.cvt32to16_shl[BLOCK_4x4] = x265_cvt32to16_shl_4_sse2;
         p.cvt32to16_shl[BLOCK_8x8] = x265_cvt32to16_shl_8_sse2;
         p.cvt32to16_shl[BLOCK_16x16] = x265_cvt32to16_shl_16_sse2;
@@ -1374,9 +1374,9 @@
         p.calcresidual[BLOCK_16x16] = x265_getResidual16_sse2;
         p.calcresidual[BLOCK_32x32] = x265_getResidual32_sse2;
 
-        p.dct[DCT_4x4] = x265_dct4_sse2;
-        p.idct[IDCT_4x4] = x265_idct4_sse2;
-        p.idct[IDST_4x4] = x265_idst4_sse2;
+//        p.dct[DCT_4x4] = x265_dct4_sse2;
+//        p.idct[IDCT_4x4] = x265_idct4_sse2;
+//        p.idct[IDST_4x4] = x265_idst4_sse2;
 
         LUMA_SS_FILTERS(_sse2);
     }
@@ -1387,8 +1387,8 @@
 
         INTRA_ANG_SSSE3(ssse3);
 
-        p.dct[DST_4x4] = x265_dst4_ssse3;
-        p.idct[IDCT_8x8] = x265_idct8_ssse3;
+//        p.dct[DST_4x4] = x265_dst4_ssse3;
+//        p.idct[IDCT_8x8] = x265_idct8_ssse3;
         p.count_nonzero = x265_count_nonzero_ssse3;
     }
     if (cpuMask & X265_CPU_SSE4)
@@ -1403,11 +1403,11 @@
         CHROMA_VERT_FILTERS_SSE4_422(_sse4);
         CHROMA_HORIZ_FILTERS_444(_sse4);
 
-        p.dct[DCT_8x8] = x265_dct8_sse4;
-        p.quant = x265_quant_sse4;
-        p.nquant = x265_nquant_sse4;
-        p.dequant_normal = x265_dequant_normal_sse4;
-        p.cvt16to32_shl = x265_cvt16to32_shl_sse4;
+//        p.dct[DCT_8x8] = x265_dct8_sse4;
+//        p.quant = x265_quant_sse4;
+//        p.nquant = x265_nquant_sse4;
+//        p.dequant_normal = x265_dequant_normal_sse4;
+//        p.cvt16to32_shl = x265_cvt16to32_shl_sse4;
         p.cvt16to32_shr[BLOCK_4x4] = x265_cvt16to32_shr_4_sse4;
         p.cvt16to32_shr[BLOCK_8x8] = x265_cvt16to32_shr_8_sse4;
         p.cvt16to32_shr[BLOCK_16x16] = x265_cvt16to32_shr_16_sse4;
@@ -1435,20 +1435,20 @@
     }
     if (cpuMask & X265_CPU_AVX2)
     {
-        p.dct[DCT_4x4] = x265_dct4_avx2;
-        p.quant = x265_quant_avx2;
-        p.nquant = x265_nquant_avx2;
-        p.dequant_normal = x265_dequant_normal_avx2;
+ //       p.dct[DCT_4x4] = x265_dct4_avx2;
+//        p.quant = x265_quant_avx2;
+//        p.nquant = x265_nquant_avx2;
+//        p.dequant_normal = x265_dequant_normal_avx2;
         p.scale1D_128to64 = x265_scale1D_128to64_avx2;
 #if X86_64
-        p.dct[DCT_8x8] = x265_dct8_avx2;
+/*        p.dct[DCT_8x8] = x265_dct8_avx2;
         p.dct[DCT_16x16] = x265_dct16_avx2;
         p.dct[DCT_32x32] = x265_dct32_avx2;
         p.idct[IDCT_4x4] = x265_idct4_avx2;
         p.idct[IDCT_8x8] = x265_idct8_avx2;
         p.idct[IDCT_16x16] = x265_idct16_avx2;
         p.idct[IDCT_32x32] = x265_idct32_avx2;
-
+*/
         p.transpose[BLOCK_8x8] = x265_transpose8_avx2;
         p.transpose[BLOCK_16x16] = x265_transpose16_avx2;
         p.transpose[BLOCK_32x32] = x265_transpose32_avx2;