[x265] [PATCH] diasble old interface asm code for HIGH_BIT_DEPTH path

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1414497660 -19800
# Node ID e42e4a157c38201accd8a29af08c50cd42d0ee21
# Parent  f2b6db5c7354bc0bb953446bbb2128b33cb776b1
diasble old interface asm code for HIGH_BIT_DEPTH path

diff -r f2b6db5c7354 -r e42e4a157c38 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Tue Oct 28 17:21:19 2014 +0530
+++ b/source/common/x86/asm-primitives.cpp	Tue Oct 28 17:31:00 2014 +0530
@@ -1551,7 +1551,7 @@
         p.frame_init_lowres_core = x265_frame_init_lowres_core_sse2;
         SA8D_INTER_FROM_BLOCK(sse2);
 
-        p.cvt32to16_shr = x265_cvt32to16_shr_sse2;
+  //      p.cvt32to16_shr = x265_cvt32to16_shr_sse2;
         p.cvt32to16_shl[BLOCK_4x4] = x265_cvt32to16_shl_4_sse2;
         p.cvt32to16_shl[BLOCK_8x8] = x265_cvt32to16_shl_8_sse2;
         p.cvt32to16_shl[BLOCK_16x16] = x265_cvt32to16_shl_16_sse2;
@@ -1565,9 +1565,9 @@
         p.transpose[BLOCK_64x64] = x265_transpose64_sse2;
         p.ssim_4x4x2_core = x265_pixel_ssim_4x4x2_core_sse2;
         p.ssim_end_4 = x265_pixel_ssim_end4_sse2;
-        p.dct[DCT_4x4] = x265_dct4_sse2;
-        p.idct[IDCT_4x4] = x265_idct4_sse2;
-        p.idct[IDST_4x4] = x265_idst4_sse2;
+  //      p.dct[DCT_4x4] = x265_dct4_sse2;
+  //      p.idct[IDCT_4x4] = x265_idct4_sse2;
+  //      p.idct[IDST_4x4] = x265_idst4_sse2;
         p.planecopy_sp = x265_downShift_16_sse2;
         p.copy_shl[BLOCK_4x4] = x265_copy_shl_4_sse2;
         p.copy_shl[BLOCK_8x8] = x265_copy_shl_8_sse2;
@@ -1605,8 +1605,8 @@
         p.chroma_p2s[X265_CSP_I422] = x265_chroma_p2s_ssse3;
         p.chroma_p2s[X265_CSP_I444] = x265_luma_p2s_ssse3; // for i444 , chroma_p2s can be replaced by luma_p2s
 
-        p.dct[DST_4x4] = x265_dst4_ssse3;
-        p.idct[IDCT_8x8] = x265_idct8_ssse3;
+  //      p.dct[DST_4x4] = x265_dst4_ssse3;
+  //      p.idct[IDCT_8x8] = x265_idct8_ssse3;
         p.count_nonzero = x265_count_nonzero_ssse3;
     }
     if (cpuMask & X265_CPU_SSE4)
@@ -1616,7 +1616,7 @@
         LUMA_ADDAVG(_sse4);
         CHROMA_ADDAVG(_sse4);
         CHROMA_ADDAVG_422(_sse4);
-        p.cvt16to32_shl = x265_cvt16to32_shl_sse4;
+  //      p.cvt16to32_shl = x265_cvt16to32_shl_sse4;
         p.cvt16to32_shr[BLOCK_4x4] = x265_cvt16to32_shr_4_sse4;
         p.cvt16to32_shr[BLOCK_8x8] = x265_cvt16to32_shr_8_sse4;
         p.cvt16to32_shr[BLOCK_16x16] = x265_cvt16to32_shr_16_sse4;
@@ -1666,9 +1666,9 @@
 
         p.calcresidual[BLOCK_16x16] = x265_getResidual16_sse4;
         p.calcresidual[BLOCK_32x32] = x265_getResidual32_sse4;
-        p.quant = x265_quant_sse4;
-        p.nquant = x265_nquant_sse4;
-        p.dequant_normal = x265_dequant_normal_sse4;
+ //       p.quant = x265_quant_sse4;
+ //       p.nquant = x265_nquant_sse4;
+ //       p.dequant_normal = x265_dequant_normal_sse4;
         p.weight_pp = x265_weight_pp_sse4;
         p.weight_sp = x265_weight_sp_sse4;
         p.intra_pred[0][BLOCK_4x4] = x265_intra_pred_planar4_sse4;
@@ -1689,9 +1689,9 @@
         INTRA_ANG_SSE4_COMMON(sse4);
         INTRA_ANG_SSE4(sse4);
 
-        p.dct[DCT_8x8] = x265_dct8_sse4;
+//        p.dct[DCT_8x8] = x265_dct8_sse4;
         p.copy_shr = x265_copy_shr_sse4;
-        p.denoiseDct = x265_denoise_dct_sse4;
+//        p.denoiseDct = x265_denoise_dct_sse4;
     }
     if (cpuMask & X265_CPU_AVX)
     {