[x265] [PATCH 7 of 7] asm: intra_pred_ang4_30 improve by ~38% over SSE4, 160.00c -> 99.99c
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Thu Apr 2 06:44:28 CEST 2015
# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1427890565 -19800
# Wed Apr 01 17:46:05 2015 +0530
# Node ID 05739d7d823f3231bc65fd7dc9f614befea2880d
# Parent f4147dbe79cdd1f9e677bd953aaa03816100d1ad
asm: intra_pred_ang4_30 improve by ~38% over SSE4, 160.00c -> 99.99c
diff -r f4147dbe79cd -r 05739d7d823f source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Apr 01 17:33:37 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Apr 01 17:46:05 2015 +0530
@@ -1609,6 +1609,7 @@
p.cu[BLOCK_4x4].intra_pred[27] = x265_intra_pred_ang4_27_avx2;
p.cu[BLOCK_4x4].intra_pred[28] = x265_intra_pred_ang4_28_avx2;
p.cu[BLOCK_4x4].intra_pred[29] = x265_intra_pred_ang4_29_avx2;
+ p.cu[BLOCK_4x4].intra_pred[30] = x265_intra_pred_ang4_30_avx2;
p.cu[BLOCK_8x8].intra_pred[3] = x265_intra_pred_ang8_3_avx2;
p.cu[BLOCK_8x8].intra_pred[33] = x265_intra_pred_ang8_33_avx2;
p.cu[BLOCK_8x8].intra_pred[4] = x265_intra_pred_ang8_4_avx2;
diff -r f4147dbe79cd -r 05739d7d823f source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h Wed Apr 01 17:33:37 2015 +0530
+++ b/source/common/x86/intrapred.h Wed Apr 01 17:46:05 2015 +0530
@@ -177,6 +177,7 @@
void x265_intra_pred_ang4_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang4_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang4_29_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang4_30_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_3_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_33_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_4_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r f4147dbe79cd -r 05739d7d823f source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Wed Apr 01 17:33:37 2015 +0530
+++ b/source/common/x86/intrapred8.asm Wed Apr 01 17:46:05 2015 +0530
@@ -513,10 +513,12 @@
ALIGN 32
intra_pred_shuff_0_4: times 4 db 0, 1, 1, 2, 2, 3, 3, 4
intra_pred4_shuff1: db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5
+intra_pred4_shuff2: db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5
c_ang4_mode_27: db 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8
c_ang4_mode_28: db 27, 5, 27, 5, 27, 5, 27, 5, 22, 10, 22, 10, 22, 10, 22, 10, 17, 15, 17, 15, 17, 15, 17, 15, 12, 20, 12, 20, 12, 20, 12, 20
c_ang4_mode_29: db 23, 9, 23, 9, 23, 9, 23, 9, 14, 18, 14, 18, 14, 18, 14, 18, 5, 27, 5, 27, 5, 27, 5, 27, 28, 4, 28, 4, 28, 4, 28, 4
+c_ang4_mode_30: db 19, 13, 19, 13, 19, 13, 19, 13, 6, 26, 6, 26, 6, 26, 6, 26, 25, 7, 25, 7, 25, 7, 25, 7, 12, 20, 12, 20, 12, 20, 12, 20
ALIGN 32
;; (blkSize - 1 - x)
@@ -15525,3 +15527,19 @@
movd [r0], xm0
pextrd [r0 + r1], xm0, 1
RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_30, 3, 3, 1
+ vbroadcasti128 m0, [r2 + 1]
+ pshufb m0, [intra_pred4_shuff2]
+ pmaddubsw m0, [c_ang4_mode_30]
+ pmulhrsw m0, [pw_1024]
+ packuswb m0, m0
+
+ movd [r0], xm0
+ pextrd [r0 + r1], xm0, 1
+ vextracti128 xm0, m0, 1
+ lea r0, [r0 + 2 * r1]
+ movd [r0], xm0
+ pextrd [r0 + r1], xm0, 1
+ RET
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