[x265] [PATCH 06 of 11] asm: intra_pred_ang4_23 improved by ~48 over SSE4
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Thu Apr 2 12:49:40 CEST 2015
# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1427957412 -19800
# Thu Apr 02 12:20:12 2015 +0530
# Node ID 4213571418e19afccc4c732f2c82e839691d95ff
# Parent 48455a4b18c1ab88b7da28764b7ec94586337e5b
asm: intra_pred_ang4_23 improved by ~48 over SSE4
AVX2:
intra_ang_4x4[23] 9.54x 90.03 859.20
SSE4:
intra_ang_4x4[23] 4.99x 172.52 860.52
diff -r 48455a4b18c1 -r 4213571418e1 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Apr 02 11:39:40 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Apr 02 12:20:12 2015 +0530
@@ -1606,6 +1606,7 @@
p.weight_pp = x265_weight_pp_avx2;
// intra_pred functions
+ p.cu[BLOCK_4x4].intra_pred[23] = x265_intra_pred_ang4_23_avx2;
p.cu[BLOCK_4x4].intra_pred[24] = x265_intra_pred_ang4_24_avx2;
p.cu[BLOCK_4x4].intra_pred[25] = x265_intra_pred_ang4_25_avx2;
p.cu[BLOCK_4x4].intra_pred[27] = x265_intra_pred_ang4_27_avx2;
diff -r 48455a4b18c1 -r 4213571418e1 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h Thu Apr 02 11:39:40 2015 +0530
+++ b/source/common/x86/intrapred.h Thu Apr 02 12:20:12 2015 +0530
@@ -174,6 +174,7 @@
DECL_ANG(32, 33, sse4);
#undef DECL_ANG
+void x265_intra_pred_ang4_23_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang4_24_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang4_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang4_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 48455a4b18c1 -r 4213571418e1 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Thu Apr 02 11:39:40 2015 +0530
+++ b/source/common/x86/intrapred8.asm Thu Apr 02 12:20:12 2015 +0530
@@ -516,6 +516,7 @@
intra_pred4_shuff2: db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5
intra_pred4_shuff31: db 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5, 2, 3, 3, 4, 4, 5, 5, 6
intra_pred4_shuff33: db 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 2, 3, 3, 4, 4, 5, 5, 6, 3, 4, 4, 5, 5, 6, 6, 7
+intra_pred4_shuff23: db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 12, 0, 0, 1, 1, 2, 2, 3
c_ang4_mode_27: db 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8
c_ang4_mode_28: db 27, 5, 27, 5, 27, 5, 27, 5, 22, 10, 22, 10, 22, 10, 22, 10, 17, 15, 17, 15, 17, 15, 17, 15, 12, 20, 12, 20, 12, 20, 12, 20
@@ -524,6 +525,7 @@
c_ang4_mode_31: db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
c_ang4_mode_32: db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
c_ang4_mode_33: db 6, 26, 6, 26, 6, 26, 6, 26, 12, 20, 12, 20, 12, 20, 12, 20, 18, 14, 18, 14, 18, 14, 18, 14, 24, 8, 24, 8, 24, 8, 24, 8
+c_ang4_mode_23: db 9, 23, 9, 23, 9, 23, 9, 23, 18, 14, 18, 14, 18, 14, 18, 14, 27, 5, 27, 5, 27, 5, 27, 5, 4, 28, 4, 28, 4, 28, 4, 28
c_ang4_mode_24: db 5, 27, 5, 27, 5, 27, 5, 27, 10, 22, 10, 22, 10, 22, 10, 22, 15, 17, 15, 17, 15, 17, 15, 17, 20, 12, 20, 12, 20, 12, 20, 12
c_ang4_mode_25: db 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24
@@ -15599,6 +15601,23 @@
pextrd [r0 + r1], xm0, 1
RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_23, 3, 3, 1
+ vbroadcasti128 m0, [r2]
+ pshufb m0, [intra_pred4_shuff23]
+ pmaddubsw m0, [c_ang4_mode_23]
+ pmulhrsw m0, [pw_1024]
+ packuswb m0, m0
+
+ movd [r0], xm0
+ pextrd [r0 + r1], xm0, 1
+ vextracti128 xm0, m0, 1
+ lea r0, [r0 + 2 * r1]
+ movd [r0], xm0
+ pextrd [r0 + r1], xm0, 1
+ RET
+
INIT_YMM avx2
cglobal intra_pred_ang4_24, 3, 3, 1
vbroadcasti128 m0, [r2]
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