[x265] [PATCH 2 of 9] asm: intra_pred_ang4_16 improved by ~49% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428043755 -19800
#      Fri Apr 03 12:19:15 2015 +0530
# Node ID 15aa7eca81ae400ba5a90d77bafb194c5c9cd5e2
# Parent  5d3bda7126381312ad23bb7ceed46691bc4cb471
asm: intra_pred_ang4_16 improved by ~49% over SSE4

AVX2:
intra_ang_4x4[16]       10.86x   104.30          1133.09

SSE4:
intra_ang_4x4[16]       5.51x    206.89          1139.52

diff -r 5d3bda712638 -r 15aa7eca81ae source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Apr 03 12:03:59 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Fri Apr 03 12:19:15 2015 +0530
@@ -1633,6 +1633,7 @@
         p.weight_sp = x265_weight_sp_avx2;
 
         // intra_pred functions
+        p.cu[BLOCK_4x4].intra_pred[16] = x265_intra_pred_ang4_16_avx2;
         p.cu[BLOCK_4x4].intra_pred[17] = x265_intra_pred_ang4_17_avx2;
         p.cu[BLOCK_4x4].intra_pred[19] = x265_intra_pred_ang4_19_avx2;
         p.cu[BLOCK_4x4].intra_pred[20] = x265_intra_pred_ang4_20_avx2;
diff -r 5d3bda712638 -r 15aa7eca81ae source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Fri Apr 03 12:03:59 2015 +0530
+++ b/source/common/x86/intrapred.h	Fri Apr 03 12:19:15 2015 +0530
@@ -184,6 +184,7 @@
 DECL_ANG(32, 33, sse4);
 
 #undef DECL_ANG
+void x265_intra_pred_ang4_16_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_17_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_19_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_20_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 5d3bda712638 -r 15aa7eca81ae source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Fri Apr 03 12:03:59 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Fri Apr 03 12:19:15 2015 +0530
@@ -515,6 +515,7 @@
 intra_pred4_shuff2:      db 0, 1, 1, 2, 2, 3, 3, 4, 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5
 intra_pred4_shuff31:     db 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 1, 2, 2, 3, 3, 4, 4, 5, 2, 3, 3, 4, 4, 5, 5, 6
 intra_pred4_shuff33:     db 0, 1, 1, 2, 2, 3, 3, 4, 1, 2, 2, 3, 3, 4, 4, 5, 2, 3, 3, 4, 4, 5, 5, 6, 3, 4, 4, 5, 5, 6, 6, 7
+intra_pred4_shuff16:     db 0, 9, 9, 10, 10, 11, 11, 12, 2, 0, 0, 9, 9, 10, 10, 11, 2, 0, 0, 9, 9, 10, 10, 11, 3, 2, 2, 0, 0, 9, 9, 10
 intra_pred4_shuff17:     db 0, 9, 9, 10, 10, 11, 11, 12, 1, 0, 0, 9, 9, 10, 10, 11, 2, 1, 1, 0, 0, 9, 9, 10, 4, 2, 2, 1, 1, 0, 0, 9
 intra_pred4_shuff19:     db 0, 1, 1, 2, 2, 3, 3, 4, 9, 0, 0, 1, 1, 2, 2, 3, 10, 9, 9, 0, 0, 1, 1, 2, 12, 10, 10, 9, 9, 0, 0, 1
 intra_pred4_shuff20:     db 0, 1, 1, 2, 2, 3, 3, 4, 10, 0, 0, 1, 1, 2, 2, 3, 10, 0, 0, 1, 1, 2, 2, 3, 11, 10, 10, 0, 0, 1, 1, 2
@@ -529,6 +530,7 @@
 c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_32:          db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_33:          db 6, 26, 6, 26, 6, 26, 6, 26, 12, 20, 12, 20, 12, 20, 12, 20, 18, 14, 18, 14, 18, 14, 18, 14, 24, 8, 24, 8, 24, 8, 24, 8
+c_ang4_mode_16:          db 21, 11, 21, 11, 21, 11, 21, 11, 10, 22, 10, 22, 10, 22, 10, 22, 31, 1, 31, 1, 31, 1, 31, 1, 20, 12, 20, 12, 20, 12, 20, 12
 c_ang4_mode_17:          db 26, 6, 26, 6, 26, 6, 26, 6, 20, 12, 20, 12, 20, 12, 20, 12, 14, 18, 14, 18, 14, 18, 14, 18, 8, 24, 8, 24, 8, 24, 8, 24
 c_ang4_mode_19:          db 26, 6, 26, 6, 26, 6, 26, 6, 20, 12, 20, 12, 20, 12, 20, 12, 14, 18, 14, 18, 14, 18, 14, 18, 8, 24, 8, 24, 8, 24, 8, 24
 c_ang4_mode_20:          db 21, 11, 21, 11, 21, 11, 21, 11, 10, 22, 10, 22, 10, 22, 10, 22, 31, 1, 31, 1, 31, 1, 31, 1, 20, 12, 20, 12, 20, 12, 20, 12
@@ -15862,6 +15864,26 @@
     INTRA_PRED_STORE_4x4
     RET
 
+
+INIT_YMM avx2
+cglobal intra_pred_ang4_16, 3, 3, 1
+    vbroadcasti128    m0, [r2]
+    pshufb            m0, [intra_pred4_shuff16]
+    pmaddubsw         m0, [c_ang4_mode_16]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    vpermq            m0, m0, 00001000b
+    pshufb            m0, [c_trans_4x4]
+
+    ;store
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    lea               r0, [r0 + 2 * r1]
+    pextrd            [r0], xm0, 2
+    pextrd            [r0 + r1], xm0, 3
+    RET
+
 INIT_YMM avx2
 cglobal intra_pred_ang4_17, 3, 3, 1
     vbroadcasti128    m0, [r2]