[x265] [PATCH 7 of 9] asm: intra_pred_ang4_11 improved by ~31% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428052285 -19800
#      Fri Apr 03 14:41:25 2015 +0530
# Node ID 49eab7332eeba68cecdd55b11b95355cfe2b9557
# Parent  19052d329a61e836fe88ada5c7927ab8f3c0be44
asm: intra_pred_ang4_11 improved by ~31% over SSE4

AVX2:
intra_ang_4x4[11]       10.58x   104.21          1102.93

SSE4:
intra_ang_4x4[11]       7.23x    152.13          1100.52

diff -r 19052d329a61 -r 49eab7332eeb source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Apr 03 14:03:40 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Fri Apr 03 14:41:25 2015 +0530
@@ -1633,6 +1633,7 @@
         p.weight_sp = x265_weight_sp_avx2;
 
         // intra_pred functions
+        p.cu[BLOCK_4x4].intra_pred[11] = x265_intra_pred_ang4_11_avx2;
         p.cu[BLOCK_4x4].intra_pred[12] = x265_intra_pred_ang4_12_avx2;
         p.cu[BLOCK_4x4].intra_pred[13] = x265_intra_pred_ang4_13_avx2;
         p.cu[BLOCK_4x4].intra_pred[14] = x265_intra_pred_ang4_14_avx2;
diff -r 19052d329a61 -r 49eab7332eeb source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Fri Apr 03 14:03:40 2015 +0530
+++ b/source/common/x86/intrapred.h	Fri Apr 03 14:41:25 2015 +0530
@@ -184,6 +184,7 @@
 DECL_ANG(32, 33, sse4);
 
 #undef DECL_ANG
+void x265_intra_pred_ang4_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_12_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_13_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_14_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 19052d329a61 -r 49eab7332eeb source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Fri Apr 03 14:03:40 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Fri Apr 03 14:41:25 2015 +0530
@@ -534,6 +534,7 @@
 c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_32:          db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_33:          db 6, 26, 6, 26, 6, 26, 6, 26, 12, 20, 12, 20, 12, 20, 12, 20, 18, 14, 18, 14, 18, 14, 18, 14, 24, 8, 24, 8, 24, 8, 24, 8
+c_ang4_mode_11:          db 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24
 c_ang4_mode_12:          db 5, 27, 5, 27, 5, 27, 5, 27, 10, 22, 10, 22, 10, 22, 10, 22, 15, 17, 15, 17, 15, 17, 15, 17, 20, 12, 20, 12, 20, 12, 20, 12
 c_ang4_mode_13:          db 9, 23, 9, 23, 9, 23, 9, 23, 18, 14, 18, 14, 18, 14, 18, 14, 27, 5, 27, 5, 27, 5, 27, 5, 4, 28, 4, 28, 4, 28, 4, 28
 c_ang4_mode_14:          db 13, 19, 13, 19, 13, 19, 13, 19, 26, 6, 26, 6, 26, 6, 26, 6, 7, 25, 7, 25, 7, 25, 7, 25, 20, 12, 20, 12, 20, 12, 20, 12
@@ -15872,6 +15873,24 @@
     INTRA_PRED_STORE_4x4
     RET
 
+INIT_YMM avx2
+cglobal intra_pred_ang4_11, 3, 3, 1
+    vbroadcasti128    m0, [r2]
+    pshufb            m0, [intra_pred4_shuff12]
+    pmaddubsw         m0, [c_ang4_mode_11]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    vpermq            m0, m0, 00001000b
+    pshufb            m0, [c_trans_4x4]
+
+    ;store
+    movd              [r0], xm0
+    pextrd            [r0 + r1], xm0, 1
+    lea               r0, [r0 + 2 * r1]
+    pextrd            [r0], xm0, 2
+    pextrd            [r0 + r1], xm0, 3
+    RET
 
 INIT_YMM avx2
 cglobal intra_pred_ang4_12, 3, 3, 1