[x265] [PATCH 9 of 9] asm: reduce code size with macro 'INTRA_PRED_TRANS_STORE_4x4'
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Fri Apr 3 12:20:21 CEST 2015
# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428053887 -19800
# Fri Apr 03 15:08:07 2015 +0530
# Node ID 16a77e2c2ab2d7a112a55d9616bab24efbf63aa7
# Parent 5f6d4c27a01c1b8cacb5cfcc7373ae7fb6dd82f4
asm: reduce code size with macro 'INTRA_PRED_TRANS_STORE_4x4'
diff -r 5f6d4c27a01c -r 16a77e2c2ab2 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Fri Apr 03 14:55:56 2015 +0530
+++ b/source/common/x86/intrapred8.asm Fri Apr 03 15:08:07 2015 +0530
@@ -15798,6 +15798,18 @@
pextrd [r0 + r1], xm0, 1
%endmacro
+%macro INTRA_PRED_TRANS_STORE_4x4 0
+ vpermq m0, m0, 00001000b
+ pshufb m0, [c_trans_4x4]
+
+ ;store
+ movd [r0], xm0
+ pextrd [r0 + r1], xm0, 1
+ lea r0, [r0 + 2 * r1]
+ pextrd [r0], xm0, 2
+ pextrd [r0 + r1], xm0, 3
+%endmacro
+
INIT_YMM avx2
cglobal intra_pred_ang4_27, 3, 3, 1
vbroadcasti128 m0, [r2 + 1]
@@ -15884,15 +15896,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15903,15 +15907,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15922,15 +15918,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15941,15 +15929,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15960,15 +15940,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15979,15 +15951,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -15998,15 +15962,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
@@ -16017,15 +15973,7 @@
pmulhrsw m0, [pw_1024]
packuswb m0, m0
- vpermq m0, m0, 00001000b
- pshufb m0, [c_trans_4x4]
-
- ;store
- movd [r0], xm0
- pextrd [r0 + r1], xm0, 1
- lea r0, [r0 + 2 * r1]
- pextrd [r0], xm0, 2
- pextrd [r0 + r1], xm0, 3
+ INTRA_PRED_TRANS_STORE_4x4
RET
INIT_YMM avx2
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