[x265] [PATCH 1 of 6] asm: intra_pred_ang4_8 improved by ~24% over SSE4

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428298110 -19800
#      Mon Apr 06 10:58:30 2015 +0530
# Node ID 05f6ee179cbd45995c7bbea43ad2cf8a824928d7
# Parent  ebe5e57c4b45b45338035a1009b64585f21d66d5
asm: intra_pred_ang4_8 improved by ~24% over SSE4

AVX2:
intra_ang_4x4[ 8]       9.58x    110.01          1053.65

SSE4:
intra_ang_4x4[ 8]       7.26x    146.78          1065.62

diff -r ebe5e57c4b45 -r 05f6ee179cbd source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Sat Apr 04 15:11:39 2015 -0500
+++ b/source/common/x86/asm-primitives.cpp	Mon Apr 06 10:58:30 2015 +0530
@@ -1701,6 +1701,7 @@
         p.weight_sp = x265_weight_sp_avx2;
 
         // intra_pred functions
+        p.cu[BLOCK_4x4].intra_pred[8] = x265_intra_pred_ang4_8_avx2;
         p.cu[BLOCK_4x4].intra_pred[9] = x265_intra_pred_ang4_9_avx2;
         p.cu[BLOCK_4x4].intra_pred[11] = x265_intra_pred_ang4_11_avx2;
         p.cu[BLOCK_4x4].intra_pred[12] = x265_intra_pred_ang4_12_avx2;
diff -r ebe5e57c4b45 -r 05f6ee179cbd source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Sat Apr 04 15:11:39 2015 -0500
+++ b/source/common/x86/intrapred.h	Mon Apr 06 10:58:30 2015 +0530
@@ -187,6 +187,7 @@
 DECL_ANG(32, 33, sse4);
 
 #undef DECL_ANG
+void x265_intra_pred_ang4_8_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_9_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang4_12_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r ebe5e57c4b45 -r 05f6ee179cbd source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Sat Apr 04 15:11:39 2015 -0500
+++ b/source/common/x86/intrapred8.asm	Mon Apr 06 10:58:30 2015 +0530
@@ -535,6 +535,7 @@
 c_ang4_mode_31:          db 15, 17, 15, 17, 15, 17, 15, 17, 30, 2, 30, 2, 30, 2, 30, 2, 13, 19, 13, 19, 13, 19, 13, 19, 28, 4, 28, 4, 28, 4, 28, 4
 c_ang4_mode_32:          db 11, 21, 11, 21, 11, 21, 11, 21, 22, 10, 22, 10, 22, 10, 22, 10, 1, 31, 1, 31, 1, 31, 1, 31, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_33:          db 6, 26, 6, 26, 6, 26, 6, 26, 12, 20, 12, 20, 12, 20, 12, 20, 18, 14, 18, 14, 18, 14, 18, 14, 24, 8, 24, 8, 24, 8, 24, 8
+c_ang4_mode_8:           db 27, 5, 27, 5, 27, 5, 27, 5, 22, 10, 22, 10, 22, 10, 22, 10, 17, 15, 17, 15, 17, 15, 17, 15, 12, 20, 12, 20, 12, 20, 12, 20
 c_ang4_mode_9:           db 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8
 c_ang4_mode_11:          db 2, 30, 2, 30, 2, 30, 2, 30, 4, 28, 4, 28, 4, 28, 4, 28, 6, 26, 6, 26, 6, 26, 6, 26, 8, 24, 8, 24, 8, 24, 8, 24
 c_ang4_mode_12:          db 5, 27, 5, 27, 5, 27, 5, 27, 10, 22, 10, 22, 10, 22, 10, 22, 15, 17, 15, 17, 15, 17, 15, 17, 20, 12, 20, 12, 20, 12, 20, 12
@@ -16091,6 +16092,16 @@
     INTRA_PRED_STORE_4x4
     RET
 
+INIT_YMM avx2
+cglobal intra_pred_ang4_8, 3, 3, 1
+    vbroadcasti128    m0, [r2]
+    pshufb            m0, [intra_pred4_shuff9]
+    pmaddubsw         m0, [c_ang4_mode_8]
+    pmulhrsw          m0, [pw_1024]
+    packuswb          m0, m0
+
+    INTRA_PRED_TRANS_STORE_4x4
+    RET
 
 INIT_YMM avx2
 cglobal intra_pred_ang4_9, 3, 3, 1