[x265] [PATCH 3 of 7] asm: intra_pred_ang16_9 improved by ~28% over SSE4
praveen at multicorewareinc.com
praveen at multicorewareinc.com
Tue Apr 7 14:56:48 CEST 2015
# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428393925 -19800
# Tue Apr 07 13:35:25 2015 +0530
# Node ID 9ada8e80cff7bd184a70af4dbb87c0b3a704d59d
# Parent 727494ae37dba97d14c6640e8ec22e1898c83db1
asm: intra_pred_ang16_9 improved by ~28% over SSE4
AVX2:
intra_ang_16x16[ 9] 15.68x 770.21 12074.77
SSE4:
intra_ang_16x16[ 9] 11.35x 1072.00 12165.87
diff -r 727494ae37db -r 9ada8e80cff7 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Tue Apr 07 11:02:33 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Tue Apr 07 13:35:25 2015 +0530
@@ -1761,6 +1761,7 @@
p.cu[BLOCK_8x8].intra_pred[12] = x265_intra_pred_ang8_12_avx2;
p.cu[BLOCK_8x8].intra_pred[24] = x265_intra_pred_ang8_24_avx2;
p.cu[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;
+ p.cu[BLOCK_16x16].intra_pred[9] = x265_intra_pred_ang16_9_avx2;
p.cu[BLOCK_16x16].intra_pred[11] = x265_intra_pred_ang16_11_avx2;
p.cu[BLOCK_16x16].intra_pred[25] = x265_intra_pred_ang16_25_avx2;
p.cu[BLOCK_16x16].intra_pred[28] = x265_intra_pred_ang16_28_avx2;
diff -r 727494ae37db -r 9ada8e80cff7 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h Tue Apr 07 11:02:33 2015 +0530
+++ b/source/common/x86/intrapred.h Tue Apr 07 13:35:25 2015 +0530
@@ -233,6 +233,7 @@
void x265_intra_pred_ang8_12_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_24_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang16_9_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
void x265_intra_pred_ang16_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 727494ae37db -r 9ada8e80cff7 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm Tue Apr 07 11:02:33 2015 +0530
+++ b/source/common/x86/intrapred8.asm Tue Apr 07 13:35:25 2015 +0530
@@ -143,6 +143,15 @@
db 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6
db 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
+ALIGN 32
+c_ang16_mode_9: db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18
+ db 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20
+ db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22
+ db 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24
+ db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26
+ db 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28
+ db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30
+ db 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0, 32, 0
ALIGN 32
c_ang16_mode_27: db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4
@@ -12057,6 +12066,80 @@
; transpose and store
INTRA_PRED_TRANS_STORE_16x16
RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang16_9, 3, 5, 12
+ mova m11, [pw_1024]
+
+ vbroadcasti128 m9, [r2 + 1 + 32]
+ pshufb m9, [intra_pred_shuff_0_8]
+ vbroadcasti128 m10, [r2 + 9 + 32]
+ pshufb m10, [intra_pred_shuff_0_8]
+
+ lea r3, [3 * r1]
+ lea r4, [c_ang16_mode_9]
+
+ pmaddubsw m0, m9, [r4 + 0 * mmsize]
+ pmulhrsw m0, m11
+ pmaddubsw m1, m10, [r4 + 0 * mmsize]
+ pmulhrsw m1, m11
+ packuswb m0, m1
+
+ pmaddubsw m1, m9, [r4 + 1 * mmsize]
+ pmulhrsw m1, m11
+ pmaddubsw m2, m10, [r4 + 1 * mmsize]
+ pmulhrsw m2, m11
+ packuswb m1, m2
+
+ pmaddubsw m2, m9, [r4 + 2 * mmsize]
+ pmulhrsw m2, m11
+ pmaddubsw m3, m10, [r4 + 2 * mmsize]
+ pmulhrsw m3, m11
+ packuswb m2, m3
+
+ pmaddubsw m3, m9, [r4 + 3 * mmsize]
+ pmulhrsw m3, m11
+ pmaddubsw m4, m10, [r4 + 3 * mmsize]
+ pmulhrsw m4, m11
+ packuswb m3, m4
+
+ add r4, 4 * mmsize
+
+ pmaddubsw m4, m9, [r4 + 0 * mmsize]
+ pmulhrsw m4, m11
+ pmaddubsw m5, m10, [r4 + 0 * mmsize]
+ pmulhrsw m5, m11
+ packuswb m4, m5
+
+ pmaddubsw m5, m9, [r4 + 1 * mmsize]
+ pmulhrsw m5, m11
+ pmaddubsw m6, m10, [r4 + 1 * mmsize]
+ pmulhrsw m6, m11
+ packuswb m5, m6
+
+ pmaddubsw m6, m9, [r4 + 2 * mmsize]
+ pmulhrsw m6, m11
+ pmaddubsw m7, m10, [r4 + 2 * mmsize]
+ pmulhrsw m7, m11
+ packuswb m6, m7
+
+ movu xm7, [r2 + 2 + 32]
+ pshufb xm7, [intra_pred_shuff_0_8]
+ vinserti128 m9, m9, xm7, 1
+
+ movu xm7, [r2 + 10 + 32]
+ pshufb xm7, [intra_pred_shuff_0_8]
+ vinserti128 m10, m10, xm7, 1
+
+ pmaddubsw m7, m9, [r4 + 3 * mmsize]
+ pmulhrsw m7, m11
+ pmaddubsw m8, m10, [r4 + 3 * mmsize]
+ pmulhrsw m8, m11
+ packuswb m7, m8
+
+ ; transpose and store
+ INTRA_PRED_TRANS_STORE_16x16
+ RET
%endif
INIT_YMM avx2
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