[x265] [PATCH 6 of 9] asm: intra_pred_ang8_15 improved by ~5% over SSE4

praveen at multicorewareinc.com praveen at multicorewareinc.com
Thu Apr 9 15:20:14 CEST 2015


# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1428579494 -19800
#      Thu Apr 09 17:08:14 2015 +0530
# Node ID 31ce12d63d6560df4ce29bdb948525cf73f057f4
# Parent  48278b974eec1dfc8da1643355a701ea073fec36
asm: intra_pred_ang8_15 improved by ~5% over SSE4

AVX2:
intra_ang_8x8[15]       9.57x    342.52          3279.56

SSE4:
intra_ang_8x8[15]       8.95x    360.01          3223.45

diff -r 48278b974eec -r 31ce12d63d65 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu Apr 09 16:30:54 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Thu Apr 09 17:08:14 2015 +0530
@@ -1766,6 +1766,7 @@
         p.cu[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;
         p.cu[BLOCK_8x8].intra_pred[13] = x265_intra_pred_ang8_13_avx2;
         p.cu[BLOCK_8x8].intra_pred[14] = x265_intra_pred_ang8_14_avx2;
+        p.cu[BLOCK_8x8].intra_pred[15] = x265_intra_pred_ang8_15_avx2;
         p.cu[BLOCK_16x16].intra_pred[3] = x265_intra_pred_ang16_3_avx2;
         p.cu[BLOCK_16x16].intra_pred[4] = x265_intra_pred_ang16_4_avx2;
         p.cu[BLOCK_16x16].intra_pred[5] = x265_intra_pred_ang16_5_avx2;
diff -r 48278b974eec -r 31ce12d63d65 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Thu Apr 09 16:30:54 2015 +0530
+++ b/source/common/x86/intrapred.h	Thu Apr 09 17:08:14 2015 +0530
@@ -235,6 +235,7 @@
 void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_13_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_14_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang8_15_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang16_3_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang16_4_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang16_5_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
diff -r 48278b974eec -r 31ce12d63d65 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Thu Apr 09 16:30:54 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Thu Apr 09 17:08:14 2015 +0530
@@ -684,6 +684,12 @@
                       db 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 1, 31, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18
                       db 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24
 
+ALIGN 32
+c_ang8_mode_15:       db 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30
+                      db 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 19, 13, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28
+                      db 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 21, 11, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26
+                      db 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 23, 9, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24
+
 const ang_table
 %assign x 0
 %rep 32
@@ -11876,6 +11882,68 @@
     movhps            [r0 + r3], xm2
     RET
 
+INIT_YMM avx2
+cglobal intra_pred_ang8_15, 3, 6, 6
+    mova              m3, [pw_1024]
+    movu              xm5, [r2 + 16]
+    pinsrb            xm5, [r2], 0
+    lea               r5, [intra_pred_shuff_0_8]
+    mova              xm0, xm5
+    pslldq            xm5, 1
+    pinsrb            xm5, [r2 + 2], 0
+    vinserti128       m0, m0, xm5, 1
+    pshufb            m0, [r5]
+
+    lea               r4, [c_ang8_mode_15]
+    pmaddubsw         m1, m0, [r4]
+    pmulhrsw          m1, m3
+    mova              xm0, xm5
+    pslldq            xm5, 1
+    pinsrb            xm5, [r2 + 4], 0
+    vinserti128       m0, m0, xm5, 1
+    pshufb            m0, [r5]
+    pmaddubsw         m2, m0, [r4 + mmsize]
+    pmulhrsw          m2, m3
+    mova              xm0, xm5
+    pslldq            xm5, 1
+    pinsrb            xm5, [r2 + 6], 0
+    vinserti128       m0, m0, xm5, 1
+    pshufb            m0, [r5]
+    pmaddubsw         m4, m0, [r4 + 2 * mmsize]
+    pmulhrsw          m4, m3
+    mova              xm0, xm5
+    pslldq            xm5, 1
+    pinsrb            xm5, [r2 + 8], 0
+    vinserti128       m0, m0, xm5, 1
+    pshufb            m0, [r5]
+    pmaddubsw         m0, [r4 + 3 * mmsize]
+    pmulhrsw          m0, m3
+    packuswb          m1, m2
+    packuswb          m4, m0
+
+    vperm2i128        m2, m1, m4, 00100000b
+    vperm2i128        m1, m1, m4, 00110001b
+    punpcklbw         m4, m2, m1
+    punpckhbw         m2, m1
+    punpcklwd         m1, m4, m2
+    punpckhwd         m4, m2
+    mova              m0, [trans8_shuf]
+    vpermd            m1, m0, m1
+    vpermd            m4, m0, m4
+
+    lea               r3, [3 * r1]
+    movq              [r0], xm1
+    movhps            [r0 + r1], xm1
+    vextracti128      xm2, m1, 1
+    movq              [r0 + 2 * r1], xm2
+    movhps            [r0 + r3], xm2
+    lea               r0, [r0 + 4 * r1]
+    movq              [r0], xm4
+    movhps            [r0 + r1], xm4
+    vextracti128      xm2, m4, 1
+    movq              [r0 + 2 * r1], xm2
+    movhps            [r0 + r3], xm2
+    RET
 
 INIT_YMM avx2
 cglobal intra_pred_ang8_14, 3, 6, 6


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