[x265] [PATCH 1 of 2] asm: replace LEA by ADD in macro TRANSPOSE_STORE_8x32

[Min Chen]

# HG changeset patch
# User Min Chen <chenm003 at 163.com>
# Date 1439250691 25200
# Node ID 49938304ae9dc325d414872a62d70248dfa07fad
# Parent  cbdefdfca87723342d21d90c41a93254553ed3d1
asm: replace LEA by ADD in macro TRANSPOSE_STORE_8x32
---
 source/common/x86/intrapred8.asm |   13 +++++++------
 1 files changed, 7 insertions(+), 6 deletions(-)

diff -r cbdefdfca877 -r 49938304ae9d source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Thu Aug 06 14:23:43 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Mon Aug 10 16:51:31 2015 -0700
@@ -13442,6 +13442,7 @@
     INTRA_PRED_TRANS_STORE_16x16
     RET
 
+
 ; transpose 8x32 to 16x16, used for intra_ang16x16 avx2 asm
 %if ARCH_X86_64 == 1
 INIT_YMM avx2
@@ -13493,21 +13494,21 @@
     movu            [r0 + r1 * 2], xm%2
     movu            [r0 + r5 * 1], xm%11
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     movu            [r0 + r1 * 0], xm%7
     movu            [r0 + r1 * 1], xm%8
     movu            [r0 + r1 * 2], xm%4
     movu            [r0 + r5 * 1], xm%9
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     vextracti128    [r0 + r1 * 0], m%5, 1
     vextracti128    [r0 + r1 * 1], m%6, 1
     vextracti128    [r0 + r1 * 2], m%2, 1
     vextracti128    [r0 + r5 * 1], m%11, 1
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     vextracti128    [r0 + r1 * 0], m%7, 1
     vextracti128    [r0 + r1 * 1], m%8, 1
@@ -13530,21 +13531,21 @@
     movu            [r0 + r1 * 2], xm%3
     movu            [r0 + r5 * 1], xm%4
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     movu            [r0 + r1 * 0], xm%5
     movu            [r0 + r1 * 1], xm%6
     movu            [r0 + r1 * 2], xm%7
     movu            [r0 + r5 * 1], xm%8
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     vextracti128    [r0 + r1 * 0], m%1, 1
     vextracti128    [r0 + r1 * 1], m%2, 1
     vextracti128    [r0 + r1 * 2], m%3, 1
     vextracti128    [r0 + r5 * 1], m%4, 1
 
-    lea             r0, [r0 + r6]
+    add             r0, r6
 
     vextracti128    [r0 + r1 * 0], m%5, 1
     vextracti128    [r0 + r1 * 1], m%6, 1