[x265] [PATCH] blockcopy_pp_4x8 sse2 asm code optimization

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari
# Date 1422942935 -19800
# Node ID b0be54fb45cf1cbd3bf5a0543da34fb1a854b25f
# Parent  4583eda4cf55e9a7f5c11d1ea660367f3822af53
blockcopy_pp_4x8 sse2 asm code optimization

improved, 130.02c -> 117.50

diff -r 4583eda4cf55 -r b0be54fb45cf source/common/x86/blockcopy8.asm
--- a/source/common/x86/blockcopy8.asm	Mon Feb 02 17:03:40 2015 +0530
+++ b/source/common/x86/blockcopy8.asm	Tue Feb 03 11:25:35 2015 +0530
@@ -145,6 +145,38 @@
     RET
 
 ;-----------------------------------------------------------------------------
+; void blockcopy_pp_4x8(pixel* dst, intptr_t dstStride, const pixel* src, intptr_t srcStride)
+;-----------------------------------------------------------------------------
+INIT_XMM sse2
+cglobal blockcopy_pp_4x8, 4, 6, 4
+
+    lea     r4,    [3 * r1]
+    lea     r5,    [3 * r3]
+
+    movd     m0,     [r2]
+    movd     m1,     [r2 + r3]
+    movd     m2,     [r2 + 2 * r3]
+    movd     m3,     [r2 + r5]
+
+    movd     [r0],          m0
+    movd     [r0 + r1],     m1
+    movd     [r0 + 2 * r1], m2
+    movd     [r0 + r4],     m3
+
+    lea      r2,     [r2 + 4 * r3]
+    movd     m0,     [r2]
+    movd     m1,     [r2 + r3]
+    movd     m2,     [r2 + 2 * r3]
+    movd     m3,     [r2 + r5]
+
+    lea      r0,            [r0 + 4 * r1]
+    movd     [r0],          m0
+    movd     [r0 + r1],     m1
+    movd     [r0 + 2 * r1], m2
+    movd     [r0 + r4],     m3
+    RET
+
+;-----------------------------------------------------------------------------
 ; void blockcopy_pp_%1x%2(pixel* dst, intptr_t dstStride, const pixel* src, intptr_t srcStride)
 ;-----------------------------------------------------------------------------
 %macro BLOCKCOPY_PP_W4_H8 2
@@ -186,7 +218,6 @@
     RET
 %endmacro
 
-BLOCKCOPY_PP_W4_H8 4, 8
 BLOCKCOPY_PP_W4_H8 4, 16
 
 BLOCKCOPY_PP_W4_H8 4, 32