[x265] Fwd: [PATCH] blockcopy_pp_4x16 asm code optimization: eliminated branch instructions

[chen]

we can keep general register (r6d) version, it is a few faster and less thread switch cost.

 
At 2015-02-06 14:29:21,"Praveen Tiwari" <praveen at multicorewareinc.com> wrote:



---------- Forwarded message ----------
From: chen<chenm003 at 163.com>
Date: Thu, Feb 5, 2015 at 5:52 PM
Subject: Re: [x265] [PATCH] blockcopy_pp_4x16 asm code optimization: eliminated branch instructions
To: Development for x265 <x265-devel at videolan.org>



>>could you try r6d as buffer and compare performance?
very much similar
copy_pp[ 4x16]  2.44x    364.27          887.63  [r6d as buffer]
copy_pp[ 4x16]  2.42x    365.93          885.98

At 2015-02-05 18:51:21,praveen at multicorewareinc.com wrote:

># HG changeset patch
># User Praveen Tiwari
># Date 1423133470 -19800
># Node ID 7105ee079176c18464982fdc15ed0e0e05f5d015
># Parent  18edf28d3879454f940fced1e8f5b6cb81fe041f
>blockcopy_pp_4x16 asm code optimization: eliminated branch instructions
>
>diff -r 18edf28d3879 -r 7105ee079176 source/common/x86/blockcopy8.asm
>--- a/source/common/x86/blockcopy8.asm Thu Feb 05 16:05:46 2015 +0530
>+++ b/source/common/x86/blockcopy8.asm Thu Feb 05 16:21:10 2015 +0530
>@@ -183,6 +183,40 @@
>     RET
> 
> ;-----------------------------------------------------------------------------
>+; void blockcopy_pp_4x16(pixel* dst, intptr_t dstStride, const pixel* src, intptr_t srcStride)
>+;-----------------------------------------------------------------------------
>+INIT_XMM sse2
>+cglobal blockcopy_pp_4x16, 4, 6, 4
>+
>+    lea     r4,    [3 * r1]
>+    lea     r5,    [3 * r3]
>+
>+    movd     m0,     [r2]
>+    movd     m1,     [r2 + r3]
>+    movd     m2,     [r2 + 2 * r3]
>+    movd     m3,     [r2 + r5]
>+
>+    movd     [r0],          m0
>+    movd     [r0 + r1],     m1
>+    movd     [r0 + 2 * r1], m2
>+    movd     [r0 + r4],     m3
>+
>+%rep 3
>+    lea      r2,     [r2 + 4 * r3]
>+    movd     m0,     [r2]
>+    movd     m1,     [r2 + r3]
>+    movd     m2,     [r2 + 2 * r3]
>+    movd     m3,     [r2 + r5]
>+
>+    lea      r0,            [r0 + 4 * r1]
>+    movd     [r0],          m0
>+    movd     [r0 + r1],     m1
>+    movd     [r0 + 2 * r1], m2
>+    movd     [r0 + r4],     m3
>+%endrep
>+    RET
>+
>+;-----------------------------------------------------------------------------
> ; void blockcopy_pp_%1x%2(pixel* dst, intptr_t dstStride, const pixel* src, intptr_t srcStride)
> ;-----------------------------------------------------------------------------
> %macro BLOCKCOPY_PP_W4_H8 2
>@@ -223,7 +257,6 @@
>     RET
> %endmacro
> 
>-BLOCKCOPY_PP_W4_H8 4, 16
> BLOCKCOPY_PP_W4_H8 4, 32
> 
> ;-----------------------------------------------------------------------------

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