[x265] [PATCH] asm: avx2 code for sse_pp[16x16, 32x32, 64x64] for 10 bpp

[sumalatha at multicorewareinc.com]

# HG changeset patch
# User Sumalatha Polureddy
# Date 1433140427 -19800
#      Mon Jun 01 12:03:47 2015 +0530
# Node ID bcc20c06dfb7829064ab7e387a2fed13e218dafb
# Parent  4eead96be39e69b57f76796d76e77c6e937562e1
asm: avx2 code for sse_pp[16x16, 32x32, 64x64] for 10 bpp

avx2
sse_pp[16x16]  7.76x    333.10          2585.60
sse_pp[32x32]  8.89x    981.46          8722.25
sse_pp[64x64]  8.22x    4086.99         33613.38

diff -r 4eead96be39e -r bcc20c06dfb7 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Thu May 28 14:11:45 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Jun 01 12:03:47 2015 +0530
@@ -1316,6 +1316,10 @@
         p.cu[BLOCK_32x32].sse_ss = x265_pixel_ssd_ss_32x32_avx2;
         p.cu[BLOCK_64x64].sse_ss = x265_pixel_ssd_ss_64x64_avx2;
 
+        p.cu[BLOCK_16x16].sse_pp = x265_pixel_ssd_16x16_avx2;
+        p.cu[BLOCK_32x32].sse_pp = x265_pixel_ssd_32x32_avx2;
+        p.cu[BLOCK_64x64].sse_pp = x265_pixel_ssd_64x64_avx2;
+
         p.quant = x265_quant_avx2;
         p.nquant = x265_nquant_avx2;
         p.dequant_normal  = x265_dequant_normal_avx2;
diff -r 4eead96be39e -r bcc20c06dfb7 source/common/x86/ssd-a.asm
--- a/source/common/x86/ssd-a.asm	Thu May 28 14:11:45 2015 +0530
+++ b/source/common/x86/ssd-a.asm	Mon Jun 01 12:03:47 2015 +0530
@@ -312,6 +312,124 @@
     movd   eax, xm0
     RET
 %endmacro
+
+INIT_YMM avx2
+cglobal pixel_ssd_16x16, 4,7,8
+    FIX_STRIDES r1, r3
+    lea     r5, [3 * r1]
+    lea     r6, [3 * r3]
+    mov    r4d, 4
+    pxor    m0, m0
+.loop:
+    movu    m1, [r0]
+    movu    m2, [r0 + r1]
+    movu    m3, [r0 + r1 * 2]
+    movu    m4, [r0 + r5]
+    movu    m6, [r2]
+    movu    m7, [r2 + r3]
+    psubw   m1, m6
+    psubw   m2, m7
+    movu    m6, [r2 + r3 * 2]
+    movu    m7, [r2 + r6]
+    psubw   m3, m6
+    psubw   m4, m7
+
+    lea     r0, [r0 + r1 * 4]
+    lea     r2, [r2 + r3 * 4]
+
+    pmaddwd m1, m1
+    pmaddwd m2, m2
+    pmaddwd m3, m3
+    pmaddwd m4, m4
+    paddd   m1, m2
+    paddd   m3, m4
+    paddd   m0, m1
+    paddd   m0, m3
+
+    dec    r4d
+    jg .loop
+
+    HADDD   m0, m5
+    movd   eax, xm0
+    RET
+
+INIT_YMM avx2
+cglobal pixel_ssd_32x32, 4,7,8
+    add     r1, r1
+    add     r3, r3
+    mov     r4d, 16
+    pxor    m0, m0
+.loop:
+    movu    m1, [r0]
+    movu    m2, [r0 + 32]
+    movu    m3, [r0 + r1]
+    movu    m4, [r0 + r1 + 32]
+    movu    m6, [r2]
+    movu    m7, [r2 + 32]
+    psubw   m1, m6
+    psubw   m2, m7
+    movu    m6, [r2 + r3]
+    movu    m7, [r2 + r3 + 32]
+    psubw   m3, m6
+    psubw   m4, m7
+
+    lea     r0, [r0 + r1 * 2]
+    lea     r2, [r2 + r3 * 2]
+
+    pmaddwd m1, m1
+    pmaddwd m2, m2
+    pmaddwd m3, m3
+    pmaddwd m4, m4
+    paddd   m1, m2
+    paddd   m3, m4
+    paddd   m0, m1
+    paddd   m0, m3
+
+    dec    r4d
+    jg .loop
+
+    HADDD   m0, m5
+    movd   eax, xm0
+    RET
+
+INIT_YMM avx2
+cglobal pixel_ssd_64x64, 4,7,8
+    FIX_STRIDES r1, r3
+    mov    r4d, 64
+    pxor    m0, m0
+.loop:
+    movu    m1, [r0]
+    movu    m2, [r0+32]
+    movu    m3, [r0+32*2]
+    movu    m4, [r0+32*3]
+    movu    m6, [r2]
+    movu    m7, [r2+32]
+    psubw   m1, m6
+    psubw   m2, m7
+    movu    m6, [r2+32*2]
+    movu    m7, [r2+32*3]
+    psubw   m3, m6
+    psubw   m4, m7
+
+    lea     r0, [r0+r1]
+    lea     r2, [r2+r3]
+
+    pmaddwd m1, m1
+    pmaddwd m2, m2
+    pmaddwd m3, m3
+    pmaddwd m4, m4
+    paddd   m1, m2
+    paddd   m3, m4
+    paddd   m0, m1
+    paddd   m0, m3
+
+    dec    r4d
+    jg .loop
+
+    HADDD   m0, m5
+    movd   eax, xm0
+    RET
+
 INIT_MMX mmx2
 SSD_ONE     4,  4
 SSD_ONE     4,  8