[x265] [PATCH] asm: avx2 code for chroma_vpp/vps/vsp/vss[8x16, 8x32] i420 and chroma_vpp/vps/vsp/vss[8x64]for i422 for 16bpp
aasaipriya at multicorewareinc.com
aasaipriya at multicorewareinc.com
Tue Jun 9 06:46:52 CEST 2015
# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1433825204 -19800
# Tue Jun 09 10:16:44 2015 +0530
# Node ID 7fa7eed8082a48d6546ec1dc7b82740c6974955f
# Parent 2c5d6a1825389e052badbb46e3b4fdfe3b65aa48
asm: avx2 code for chroma_vpp/vps/vsp/vss[8x16, 8x32] i420 and chroma_vpp/vps/vsp/vss[8x64]for i422 for 16bpp
chroma_vpp[ 8x64] 8.74x 5463c->4275c
chroma_vps[ 8x64] 6.87x 4825c->3954c
chroma_vsp[ 8x64] 9.03x 5185c->3984c
chroma_vss[ 8x64] 7.13x 4268c->3816c
chroma_vpp[ 8x16] 8.43x 1577c->1158c
chroma_vps[ 8x16] 7.75x 1442c->1071c
chroma_vsp[ 8x16] 8.10x 1583c->1124c
chroma_vss[ 8x16] 6.59x 1369c->1089c
chroma_vpp[ 8x32] 8.79x 2892c->2185c
chroma_vps[ 8x32] 7.52x 2502c->2169c
chroma_vsp[ 8x32] 8.85x 2730c->2184c
chroma_vss[ 8x32] 6.87x 2272c->1995c
diff -r 2c5d6a182538 -r 7fa7eed8082a source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Jun 05 08:36:51 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Tue Jun 09 10:16:44 2015 +0530
@@ -1699,6 +1699,20 @@
p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hpp = x265_interp_4tap_horiz_pp_64x64_avx2;
p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hpp = x265_interp_4tap_horiz_pp_48x64_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vsp = x265_interp_4tap_vert_sp_8x16_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vss = x265_interp_4tap_vert_ss_8x16_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vpp = x265_interp_4tap_vert_pp_8x32_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vps = x265_interp_4tap_vert_ps_8x32_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vsp = x265_interp_4tap_vert_sp_8x32_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vss = x265_interp_4tap_vert_ss_8x32_avx2;
+
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vpp = x265_interp_4tap_vert_pp_8x64_avx2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vps = x265_interp_4tap_vert_ps_8x64_avx2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vsp = x265_interp_4tap_vert_sp_8x64_avx2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vss = x265_interp_4tap_vert_ss_8x64_avx2;
+
if (cpuMask & X265_CPU_BMI2)
p.scanPosLast = x265_scanPosLast_avx2_bmi2;
diff -r 2c5d6a182538 -r 7fa7eed8082a source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Fri Jun 05 08:36:51 2015 -0700
+++ b/source/common/x86/ipfilter16.asm Tue Jun 09 10:16:44 2015 +0530
@@ -68,6 +68,30 @@
times 4 dw -2, 10
times 4 dw 58, -2
+tab_ChromaCoeffVer: times 8 dw 0, 64
+ times 8 dw 0, 0
+
+ times 8 dw -2, 58
+ times 8 dw 10, -2
+
+ times 8 dw -4, 54
+ times 8 dw 16, -2
+
+ times 8 dw -6, 46
+ times 8 dw 28, -4
+
+ times 8 dw -4, 36
+ times 8 dw 36, -4
+
+ times 8 dw -4, 28
+ times 8 dw 46, -6
+
+ times 8 dw -2, 16
+ times 8 dw 54, -4
+
+ times 8 dw -2, 10
+ times 8 dw 58, -2
+
tab_LumaCoeff: dw 0, 0, 0, 64, 0, 0, 0, 0
dw -1, 4, -10, 58, 17, -5, 1, 0
dw -1, 4, -11, 40, 40, -11, 4, -1
@@ -10455,3 +10479,375 @@
IPFILTER_CHROMA_PS_6xN_AVX2 8
IPFILTER_CHROMA_PS_6xN_AVX2 16
+
+%macro FILTER_VER_CHROMA_AVX2_8xN 2
+INIT_YMM avx2
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_vert_%1_8x%2, 4, 9, 15
+ mov r4d, r4m
+ shl r4d, 6
+ add r1d, r1d
+ add r3d, r3d
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffVer]
+ add r5, r4
+%else
+ lea r5, [tab_ChromaCoeffVer + r4]
+%endif
+
+ lea r4, [r1 * 3]
+ sub r0, r1
+%ifidn %1,pp
+ vbroadcasti128 m14, [pd_32]
+%elifidn %1, sp
+ mova m14, [pd_524800]
+%else
+ vbroadcasti128 m14, [pd_n32768]
+%endif
+ lea r6, [r3 * 3]
+ lea r7, [r1 * 4]
+ mov r8d, %2 / 16
+.loopH:
+ movu xm0, [r0] ; m0 = row 0
+ movu xm1, [r0 + r1] ; m1 = row 1
+ punpckhwd xm2, xm0, xm1
+ punpcklwd xm0, xm1
+ vinserti128 m0, m0, xm2, 1
+ pmaddwd m0, [r5]
+
+ movu xm2, [r0 + r1 * 2] ; m2 = row 2
+ punpckhwd xm3, xm1, xm2
+ punpcklwd xm1, xm2
+ vinserti128 m1, m1, xm3, 1
+ pmaddwd m1, [r5]
+
+ movu xm3, [r0 + r4] ; m3 = row 3
+ punpckhwd xm4, xm2, xm3
+ punpcklwd xm2, xm3
+ vinserti128 m2, m2, xm4, 1
+ pmaddwd m4, m2, [r5 + 1 * mmsize]
+ paddd m0, m4
+ pmaddwd m2, [r5]
+
+ lea r0, [r0 + r1 * 4]
+ movu xm4, [r0] ; m4 = row 4
+ punpckhwd xm5, xm3, xm4
+ punpcklwd xm3, xm4
+ vinserti128 m3, m3, xm5, 1
+ pmaddwd m5, m3, [r5 + 1 * mmsize]
+ paddd m1, m5
+ pmaddwd m3, [r5]
+
+ movu xm5, [r0 + r1] ; m5 = row 5
+ punpckhwd xm6, xm4, xm5
+ punpcklwd xm4, xm5
+ vinserti128 m4, m4, xm6, 1
+ pmaddwd m6, m4, [r5 + 1 * mmsize]
+ paddd m2, m6
+ pmaddwd m4, [r5]
+
+ movu xm6, [r0 + r1 * 2] ; m6 = row 6
+ punpckhwd xm7, xm5, xm6
+ punpcklwd xm5, xm6
+ vinserti128 m5, m5, xm7, 1
+ pmaddwd m7, m5, [r5 + 1 * mmsize]
+ paddd m3, m7
+ pmaddwd m5, [r5]
+
+ movu xm7, [r0 + r4] ; m7 = row 7
+ punpckhwd xm8, xm6, xm7
+ punpcklwd xm6, xm7
+ vinserti128 m6, m6, xm8, 1
+ pmaddwd m8, m6, [r5 + 1 * mmsize]
+ paddd m4, m8
+ pmaddwd m6, [r5]
+
+ lea r0, [r0 + r1 * 4]
+ movu xm8, [r0] ; m8 = row 8
+ punpckhwd xm9, xm7, xm8
+ punpcklwd xm7, xm8
+ vinserti128 m7, m7, xm9, 1
+ pmaddwd m9, m7, [r5 + 1 * mmsize]
+ paddd m5, m9
+ pmaddwd m7, [r5]
+
+
+ movu xm9, [r0 + r1] ; m9 = row 9
+ punpckhwd xm10, xm8, xm9
+ punpcklwd xm8, xm9
+ vinserti128 m8, m8, xm10, 1
+ pmaddwd m10, m8, [r5 + 1 * mmsize]
+ paddd m6, m10
+ pmaddwd m8, [r5]
+
+
+ movu xm10, [r0 + r1 * 2] ; m10 = row 10
+ punpckhwd xm11, xm9, xm10
+ punpcklwd xm9, xm10
+ vinserti128 m9, m9, xm11, 1
+ pmaddwd m11, m9, [r5 + 1 * mmsize]
+ paddd m7, m11
+ pmaddwd m9, [r5]
+
+ movu xm11, [r0 + r4] ; m11 = row 11
+ punpckhwd xm12, xm10, xm11
+ punpcklwd xm10, xm11
+ vinserti128 m10, m10, xm12, 1
+ pmaddwd m12, m10, [r5 + 1 * mmsize]
+ paddd m8, m12
+ pmaddwd m10, [r5]
+
+ lea r0, [r0 + r1 * 4]
+ movu xm12, [r0] ; m12 = row 12
+ punpckhwd xm13, xm11, xm12
+ punpcklwd xm11, xm12
+ vinserti128 m11, m11, xm13, 1
+ pmaddwd m13, m11, [r5 + 1 * mmsize]
+ paddd m9, m13
+ pmaddwd m11, [r5]
+
+%ifidn %1,ss
+ psrad m0, 6
+ psrad m1, 6
+ psrad m2, 6
+ psrad m3, 6
+ psrad m4, 6
+ psrad m5, 6
+%else
+ paddd m0, m14
+ paddd m1, m14
+ paddd m2, m14
+ paddd m3, m14
+ paddd m4, m14
+ paddd m5, m14
+%ifidn %1,pp
+ psrad m0, 6
+ psrad m1, 6
+ psrad m2, 6
+ psrad m3, 6
+ psrad m4, 6
+ psrad m5, 6
+%elifidn %1, sp
+ psrad m0, 10
+ psrad m1, 10
+ psrad m2, 10
+ psrad m3, 10
+ psrad m4, 10
+ psrad m5, 10
+%else
+ psrad m0, 2
+ psrad m1, 2
+ psrad m2, 2
+ psrad m3, 2
+ psrad m4, 2
+ psrad m5, 2
+%endif
+%endif
+
+ packssdw m0, m1
+ packssdw m2, m3
+ packssdw m4, m5
+ vpermq m0, m0, q3120
+ vpermq m2, m2, q3120
+ vpermq m4, m4, q3120
+ pxor m5, m5
+ mova m3, [pw_pixel_max]
+%ifidn %1,pp
+ CLIPW m0, m5, m3
+ CLIPW m2, m5, m3
+ CLIPW m4, m5, m3
+%elifidn %1, sp
+ CLIPW m0, m5, m3
+ CLIPW m2, m5, m3
+ CLIPW m4, m5, m3
+%endif
+
+ vextracti128 xm1, m0, 1
+ movu [r2], xm0
+ movu [r2 + r3], xm1
+ vextracti128 xm1, m2, 1
+ movu [r2 + r3 * 2], xm2
+ movu [r2 + r6], xm1
+ lea r2, [r2 + r3 * 4]
+ vextracti128 xm1, m4, 1
+ movu [r2], xm4
+ movu [r2 + r3], xm1
+
+ movu xm13, [r0 + r1] ; m13 = row 13
+ punpckhwd xm0, xm12, xm13
+ punpcklwd xm12, xm13
+ vinserti128 m12, m12, xm0, 1
+ pmaddwd m0, m12, [r5 + 1 * mmsize]
+ paddd m10, m0
+ pmaddwd m12, [r5]
+
+ movu xm0, [r0 + r1 * 2] ; m0 = row 14
+ punpckhwd xm1, xm13, xm0
+ punpcklwd xm13, xm0
+ vinserti128 m13, m13, xm1, 1
+ pmaddwd m1, m13, [r5 + 1 * mmsize]
+ paddd m11, m1
+ pmaddwd m13, [r5]
+
+%ifidn %1,ss
+ psrad m6, 6
+ psrad m7, 6
+%else
+ paddd m6, m14
+ paddd m7, m14
+%ifidn %1,pp
+ psrad m6, 6
+ psrad m7, 6
+%elifidn %1, sp
+ psrad m6, 10
+ psrad m7, 10
+%else
+ psrad m6, 2
+ psrad m7, 2
+%endif
+%endif
+
+ packssdw m6, m7
+ vpermq m6, m6, q3120
+%ifidn %1,pp
+ CLIPW m6, m5, m3
+%elifidn %1, sp
+ CLIPW m6, m5, m3
+%endif
+ vextracti128 xm7, m6, 1
+ movu [r2 + r3 * 2], xm6
+ movu [r2 + r6], xm7
+
+ movu xm1, [r0 + r4] ; m1 = row 15
+ punpckhwd xm2, xm0, xm1
+ punpcklwd xm0, xm1
+ vinserti128 m0, m0, xm2, 1
+ pmaddwd m2, m0, [r5 + 1 * mmsize]
+ paddd m12, m2
+ pmaddwd m0, [r5]
+
+ lea r0, [r0 + r1 * 4]
+ movu xm2, [r0] ; m2 = row 16
+ punpckhwd xm6, xm1, xm2
+ punpcklwd xm1, xm2
+ vinserti128 m1, m1, xm6, 1
+ pmaddwd m6, m1, [r5 + 1 * mmsize]
+ paddd m13, m6
+ pmaddwd m1, [r5]
+
+ movu xm6, [r0 + r1] ; m6 = row 17
+ punpckhwd xm4, xm2, xm6
+ punpcklwd xm2, xm6
+ vinserti128 m2, m2, xm4, 1
+ pmaddwd m2, [r5 + 1 * mmsize]
+ paddd m0, m2
+
+ movu xm4, [r0 + r1 * 2] ; m4 = row 18
+ punpckhwd xm2, xm6, xm4
+ punpcklwd xm6, xm4
+ vinserti128 m6, m6, xm2, 1
+ pmaddwd m6, [r5 + 1 * mmsize]
+ paddd m1, m6
+
+%ifidn %1,ss
+ psrad m8, 6
+ psrad m9, 6
+ psrad m10, 6
+ psrad m11, 6
+ psrad m12, 6
+ psrad m13, 6
+ psrad m0, 6
+ psrad m1, 6
+%else
+ paddd m8, m14
+ paddd m9, m14
+ paddd m10, m14
+ paddd m11, m14
+ paddd m12, m14
+ paddd m13, m14
+ paddd m0, m14
+ paddd m1, m14
+%ifidn %1,pp
+ psrad m8, 6
+ psrad m9, 6
+ psrad m10, 6
+ psrad m11, 6
+ psrad m12, 6
+ psrad m13, 6
+ psrad m0, 6
+ psrad m1, 6
+%elifidn %1, sp
+ psrad m8, 10
+ psrad m9, 10
+ psrad m10, 10
+ psrad m11, 10
+ psrad m12, 10
+ psrad m13, 10
+ psrad m0, 10
+ psrad m1, 10
+%else
+ psrad m8, 2
+ psrad m9, 2
+ psrad m10, 2
+ psrad m11, 2
+ psrad m12, 2
+ psrad m13, 2
+ psrad m0, 2
+ psrad m1, 2
+%endif
+%endif
+
+ packssdw m8, m9
+ packssdw m10, m11
+ packssdw m12, m13
+ packssdw m0, m1
+ vpermq m8, m8, q3120
+ vpermq m10, m10, q3120
+ vpermq m12, m12, q3120
+ vpermq m0, m0, q3120
+%ifidn %1,pp
+ CLIPW m8, m5, m3
+ CLIPW m10, m5, m3
+ CLIPW m12, m5, m3
+ CLIPW m0, m5, m3
+%elifidn %1, sp
+ CLIPW m8, m5, m3
+ CLIPW m10, m5, m3
+ CLIPW m12, m5, m3
+ CLIPW m0, m5, m3
+%endif
+ vextracti128 xm9, m8, 1
+ vextracti128 xm11, m10, 1
+ vextracti128 xm13, m12, 1
+ vextracti128 xm1, m0, 1
+ lea r2, [r2 + r3 * 4]
+ movu [r2], xm8
+ movu [r2 + r3], xm9
+ movu [r2 + r3 * 2], xm10
+ movu [r2 + r6], xm11
+ lea r2, [r2 + r3 * 4]
+ movu [r2], xm12
+ movu [r2 + r3], xm13
+ movu [r2 + r3 * 2], xm0
+ movu [r2 + r6], xm1
+ lea r2, [r2 + r3 * 4]
+ dec r8d
+ jnz .loopH
+ RET
+%endif
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_8xN pp, 16
+FILTER_VER_CHROMA_AVX2_8xN ps, 16
+FILTER_VER_CHROMA_AVX2_8xN ss, 16
+FILTER_VER_CHROMA_AVX2_8xN sp, 16
+FILTER_VER_CHROMA_AVX2_8xN pp, 32
+FILTER_VER_CHROMA_AVX2_8xN ps, 32
+FILTER_VER_CHROMA_AVX2_8xN sp, 32
+FILTER_VER_CHROMA_AVX2_8xN ss, 32
+FILTER_VER_CHROMA_AVX2_8xN pp, 64
+FILTER_VER_CHROMA_AVX2_8xN ps, 64
+FILTER_VER_CHROMA_AVX2_8xN sp, 64
+FILTER_VER_CHROMA_AVX2_8xN ss, 64
+
diff -r 2c5d6a182538 -r 7fa7eed8082a source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Fri Jun 05 08:36:51 2015 -0700
+++ b/source/common/x86/ipfilter8.h Tue Jun 09 10:16:44 2015 +0530
@@ -403,6 +403,8 @@
CHROMA_420_HORIZ_FILTERS(_avx2);
CHROMA_422_HORIZ_FILTERS(_avx2);
CHROMA_444_HORIZ_FILTERS(_avx2);
+CHROMA_420_VERT_FILTERS(_avx2);
+CHROMA_422_VERT_FILTERS(_avx2);
#undef CHROMA_420_VERT_FILTERS_SSE4
#undef CHROMA_420_VERT_FILTERS
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