[x265] [PATCH] asm: avx2 code for chroma_vpp/vsp/vps/vss[4x2][i420] 16bpp

aasaipriya at multicorewareinc.com aasaipriya at multicorewareinc.com
Wed Jun 10 08:05:50 CEST 2015


# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1433916342 -19800
#      Wed Jun 10 11:35:42 2015 +0530
# Node ID 7c2b17f4efb260d88f6757d594a1207874ab45a2
# Parent  436e5792cd7e5ff348f25878a8d927144a45c5e0
asm: avx2 code for chroma_vpp/vsp/vps/vss[4x2][i420] 16bpp

avx2:
chroma_vpp[  4x2]       4.51x    175.98          794.15
chroma_vps[  4x2]       4.54x    132.54          602.18
chroma_vsp[  4x2]       5.41x    145.42          787.22
chroma_vss[  4x2]       4.32x    127.82          551.58
sse:
chroma_vpp[  4x2]       2.86x    259.90          743.49
chroma_vps[  4x2]       2.58x    230.02          592.73
chroma_vsp[  4x2]       2.93x    252.78          741.00
chroma_vss[  4x2]       2.94x    197.53          581.53

diff -r 436e5792cd7e -r 7c2b17f4efb2 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Wed Jun 10 11:26:05 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Wed Jun 10 11:35:42 2015 +0530
@@ -1699,6 +1699,10 @@
         p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hpp = x265_interp_4tap_horiz_pp_64x64_avx2;
         p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hpp = x265_interp_4tap_horiz_pp_48x64_avx2;
 
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vpp = x265_interp_4tap_vert_pp_4x2_avx2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vps = x265_interp_4tap_vert_ps_4x2_avx2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vsp = x265_interp_4tap_vert_sp_4x2_avx2;
+        p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vss = x265_interp_4tap_vert_ss_4x2_avx2;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vpp = x265_interp_4tap_vert_pp_8x2_avx2;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vps = x265_interp_4tap_vert_ps_8x2_avx2;
         p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vsp = x265_interp_4tap_vert_sp_8x2_avx2;
diff -r 436e5792cd7e -r 7c2b17f4efb2 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm	Wed Jun 10 11:26:05 2015 +0530
+++ b/source/common/x86/ipfilter16.asm	Wed Jun 10 11:35:42 2015 +0530
@@ -11067,3 +11067,70 @@
 FILTER_VER_CHROMA_AVX2_8x2 ps, 0, 2
 FILTER_VER_CHROMA_AVX2_8x2 sp, doClip, 10
 FILTER_VER_CHROMA_AVX2_8x2 ss, 0, 6
+
+%macro FILTER_VER_CHROMA_AVX2_4x2 3
+INIT_YMM avx2
+cglobal interp_4tap_vert_%1_4x2, 4, 6, 7
+    mov             r4d, r4m
+    add             r1d, r1d
+    add             r3d, r3d
+    shl             r4d, 6
+
+%ifdef PIC
+    lea             r5, [tab_ChromaCoeffVer]
+    add             r5, r4
+%else
+    lea             r5, [tab_ChromaCoeffVer + r4]
+%endif
+
+    lea             r4, [r1 * 3]
+    sub             r0, r1
+
+%ifidn %1,pp
+    vbroadcasti128  m6, [pd_32]
+%elifidn %1, sp
+    mova            m6, [pd_524800]
+%else
+    vbroadcasti128  m6, [pd_n32768]
+%endif
+
+    movq            xm0, [r0]                       ; row 0
+    movq            xm1, [r0 + r1]                  ; row 1
+    punpcklwd       xm0, xm1
+
+    movq            xm2, [r0 + r1 * 2]              ; row 2
+    punpcklwd       xm1, xm2
+    vinserti128     m0, m0, xm1, 1                  ; m0 = [2 1 1 0]
+    pmaddwd         m0, [r5]
+
+    movq            xm3, [r0 + r4]                  ; row 3
+    punpcklwd       xm2, xm3
+    lea             r0, [r0 + 4 * r1]
+    movq            xm4, [r0]                       ; row 4
+    punpcklwd       xm3, xm4
+    vinserti128     m2, m2, xm3, 1                  ; m2 = [4 3 3 2]
+    pmaddwd         m5, m2, [r5 + 1 * mmsize]
+    paddd           m0, m5
+
+%ifnidn %1, ss
+    paddd           m0, m6
+%endif
+    psrad           m0, %3
+    packssdw        m0, m0
+    pxor            m1, m1
+
+%ifidn %2, doClip
+    CLIPW           m0, m1, [pw_pixel_max]
+%endif
+
+    vextracti128    xm2, m0, 1
+    lea             r4, [r3 * 3]
+    movq            [r2], xm0
+    movq            [r2 + r3], xm2
+    RET
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_4x2 pp, doClip, 6
+FILTER_VER_CHROMA_AVX2_4x2 ps, 0, 2
+FILTER_VER_CHROMA_AVX2_4x2 sp, doClip, 10
+FILTER_VER_CHROMA_AVX2_4x2 ss, 0, 6
diff -r 436e5792cd7e -r 7c2b17f4efb2 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h	Wed Jun 10 11:26:05 2015 +0530
+++ b/source/common/x86/ipfilter8.h	Wed Jun 10 11:35:42 2015 +0530
@@ -1123,6 +1123,10 @@
 void x265_interp_8tap_vert_ps_64x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
 void x265_interp_8tap_vert_ps_64x48_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
 void x265_interp_8tap_vert_ps_64x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_4x2_avx2(const pixel* src, intptr_t srcStride, pixel* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_4x2_avx2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_sp_4x2_avx2(const int16_t* src, intptr_t srcStride, pixel* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ss_4x2_avx2(const int16_t* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
 #endif
 #undef LUMA_FILTERS
 #undef LUMA_SP_FILTERS


More information about the x265-devel mailing list