[x265] [PATCH] asm: chroma_vpp/vss/vsp/vpp[8x4][i420] 16bpp
aasaipriya at multicorewareinc.com
aasaipriya at multicorewareinc.com
Wed Jun 10 09:59:05 CEST 2015
# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1433923139 -19800
# Wed Jun 10 13:28:59 2015 +0530
# Node ID 2b773fd93437eb947f65bd29b92bf0f9d04afca5
# Parent 88edfb951b97e49c19b9d51443abbb5ed347c47b
asm: chroma_vpp/vss/vsp/vpp[8x4][i420] 16bpp
avx2:
chroma_vpp[8x4] 6.87x 360.02 2472.17
chroma_vps[8x4] 6.23x 334.99 2087.07
chroma_vsp[8x4] 6.92x 359.95 2489.20
chroma_vss[8x4] 6.00x 310.01 1858.80
sse:
chroma_vpp[8x4] 3.87x 640.13 2476.71
chroma_vps[8x4] 3.56x 593.74 2115.50
chroma_vsp[8x4] 3.64x 637.41 2321.08
chroma_vss[8x4] 3.18x 537.85 1708.99
diff -r 88edfb951b97 -r 2b773fd93437 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed Jun 10 13:20:49 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed Jun 10 13:28:59 2015 +0530
@@ -1719,6 +1719,10 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vps = x265_interp_4tap_vert_ps_8x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vsp = x265_interp_4tap_vert_sp_8x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vss = x265_interp_4tap_vert_ss_8x2_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vps = x265_interp_4tap_vert_ps_8x4_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vsp = x265_interp_4tap_vert_sp_8x4_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vss = x265_interp_4tap_vert_ss_8x4_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x6].filter_vpp = x265_interp_4tap_vert_pp_8x6_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x6].filter_vps = x265_interp_4tap_vert_ps_8x6_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x6].filter_vsp = x265_interp_4tap_vert_sp_8x6_avx2;
diff -r 88edfb951b97 -r 2b773fd93437 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Wed Jun 10 13:20:49 2015 +0530
+++ b/source/common/x86/ipfilter16.asm Wed Jun 10 13:28:59 2015 +0530
@@ -11855,3 +11855,102 @@
FILTER_VER_CHROMA_AVX2_8x6 ps, 0, 2
FILTER_VER_CHROMA_AVX2_8x6 sp, doClip, 10
FILTER_VER_CHROMA_AVX2_8x6 ss, 0, 6
+
+%macro PROCESS_CHROMA_AVX2 3
+ movu xm0, [r0] ; m0 = row 0
+ movu xm1, [r0 + r1] ; m1 = row 1
+ punpckhwd xm2, xm0, xm1
+ punpcklwd xm0, xm1
+ vinserti128 m0, m0, xm2, 1
+ pmaddwd m0, [r5]
+ movu xm2, [r0 + r1 * 2] ; m2 = row 2
+ punpckhwd xm3, xm1, xm2
+ punpcklwd xm1, xm2
+ vinserti128 m1, m1, xm3, 1
+ pmaddwd m1, [r5]
+ movu xm3, [r0 + r4] ; m3 = row 3
+ punpckhwd xm4, xm2, xm3
+ punpcklwd xm2, xm3
+ vinserti128 m2, m2, xm4, 1
+ pmaddwd m4, m2, [r5 + 1 * mmsize]
+ paddd m0, m4
+ pmaddwd m2, [r5]
+ lea r0, [r0 + r1 * 4]
+ movu xm4, [r0] ; m4 = row 4
+ punpckhwd xm5, xm3, xm4
+ punpcklwd xm3, xm4
+ vinserti128 m3, m3, xm5, 1
+ pmaddwd m5, m3, [r5 + 1 * mmsize]
+ paddd m1, m5
+ pmaddwd m3, [r5]
+ movu xm5, [r0 + r1] ; m5 = row 5
+ punpckhwd xm6, xm4, xm5
+ punpcklwd xm4, xm5
+ vinserti128 m4, m4, xm6, 1
+ pmaddwd m4, [r5 + 1 * mmsize]
+ paddd m2, m4
+ movu xm6, [r0 + r1 * 2] ; m6 = row 6
+ punpckhwd xm4, xm5, xm6
+ punpcklwd xm5, xm6
+ vinserti128 m5, m5, xm4, 1
+ pmaddwd m5, [r5 + 1 * mmsize]
+ paddd m3, m5
+%ifnidn %1,ss
+ paddd m0, m7
+ paddd m1, m7
+ paddd m2, m7
+ paddd m3, m7
+%endif
+ psrad m0, %3
+ psrad m1, %3
+ psrad m2, %3
+ psrad m3, %3
+ packssdw m0, m1
+ packssdw m2, m3
+ vpermq m0, m0, q3120
+ vpermq m2, m2, q3120
+ pxor m4, m4
+%ifidn %2, doClip
+ CLIPW m0, m4, [pw_pixel_max]
+ CLIPW m2, m4, [pw_pixel_max]
+%endif
+ vextracti128 xm1, m0, 1
+ vextracti128 xm3, m2, 1
+%endmacro
+
+
+%macro FILTER_VER_CHROMA_AVX2_8x4 3
+INIT_YMM avx2
+cglobal interp_4tap_vert_%1_8x4, 4, 6, 8
+ mov r4d, r4m
+ shl r4d, 6
+ add r1d, r1d
+ add r3d, r3d
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffVer]
+ add r5, r4
+%else
+ lea r5, [tab_ChromaCoeffVer + r4]
+%endif
+ lea r4, [r1 * 3]
+ sub r0, r1
+%ifidn %1,pp
+ vbroadcasti128 m7, [pd_32]
+%elifidn %1, sp
+ mova m7, [pd_524800]
+%else
+ vbroadcasti128 m7, [pd_n32768]
+%endif
+ PROCESS_CHROMA_AVX2 %1, %2, %3
+ movu [r2], xm0
+ movu [r2 + r3], xm1
+ movu [r2 + r3 * 2], xm2
+ lea r4, [r3 * 3]
+ movu [r2 + r4], xm3
+ RET
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_8x4 pp, doClip, 6
+FILTER_VER_CHROMA_AVX2_8x4 ps, 0, 2
+FILTER_VER_CHROMA_AVX2_8x4 sp, doClip, 10
+FILTER_VER_CHROMA_AVX2_8x4 ss, 0, 6
More information about the x265-devel
mailing list