[x265] [PATCH] asm:avx2 code for chroma_vpp/vps/vsp/vss[8x8][i420] 16bpp
aasaipriya at multicorewareinc.com
aasaipriya at multicorewareinc.com
Thu Jun 11 10:09:20 CEST 2015
# HG changeset patch
# User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
# Date 1434010152 -19800
# Thu Jun 11 13:39:12 2015 +0530
# Node ID 72f4e97a62ba5c2f8fb7d61403bc6901ad712010
# Parent dcc6fbefe945edd5daaa6504c9516b0be90d1b7d
asm:avx2 code for chroma_vpp/vps/vsp/vss[8x8][i420] 16bpp
avx2:
chroma_vpp[ 8x8] 8.28x 605.87 5015.70
chroma_vps[ 8x8] 7.12x 581.66 4140.08
chroma_vsp[ 8x8] 7.94x 605.86 4812.13
chroma_vss[ 8x8] 6.46x 540.05 3487.71
sse:
chroma_vpp[ 8x8] 5.31x 953.57 5067.55
chroma_vps[ 8x8] 4.58x 903.48 4140.92
chroma_vsp[ 8x8] 5.00x 987.65 4940.24
chroma_vss[ 8x8] 3.80x 855.33 3246.60
diff -r dcc6fbefe945 -r 72f4e97a62ba source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Jun 11 13:18:25 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Jun 11 13:39:12 2015 +0530
@@ -1726,6 +1726,10 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vps = x265_interp_4tap_vert_ps_8x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vsp = x265_interp_4tap_vert_sp_8x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vss = x265_interp_4tap_vert_ss_8x2_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vsp = x265_interp_4tap_vert_sp_8x8_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vss = x265_interp_4tap_vert_ss_8x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vsp = x265_interp_4tap_vert_sp_8x16_avx2;
diff -r dcc6fbefe945 -r 72f4e97a62ba source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Thu Jun 11 13:18:25 2015 +0530
+++ b/source/common/x86/ipfilter16.asm Thu Jun 11 13:39:12 2015 +0530
@@ -12122,3 +12122,158 @@
FILTER_VER_CHROMA_AVX2_4xN ps, 32, 0, 2
FILTER_VER_CHROMA_AVX2_4xN sp, 32, 1, 10
FILTER_VER_CHROMA_AVX2_4xN ss, 32, 0, 6
+
+%macro FILTER_VER_CHROMA_AVX2_8x8 3
+INIT_YMM avx2
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_vert_%1_8x8, 4, 6, 12
+ mov r4d, r4m
+ add r1d, r1d
+ add r3d, r3d
+ shl r4d, 6
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffVer]
+ add r5, r4
+%else
+ lea r5, [tab_ChromaCoeffVer + r4]
+%endif
+
+ lea r4, [r1 * 3]
+ sub r0, r1
+
+%ifidn %1,pp
+ vbroadcasti128 m11, [pd_32]
+%elifidn %1, sp
+ mova m11, [pd_524800]
+%else
+ vbroadcasti128 m11, [pd_n32768]
+%endif
+
+ movu xm0, [r0] ; m0 = row 0
+ movu xm1, [r0 + r1] ; m1 = row 1
+ punpckhwd xm2, xm0, xm1
+ punpcklwd xm0, xm1
+ vinserti128 m0, m0, xm2, 1
+ pmaddwd m0, [r5]
+ movu xm2, [r0 + r1 * 2] ; m2 = row 2
+ punpckhwd xm3, xm1, xm2
+ punpcklwd xm1, xm2
+ vinserti128 m1, m1, xm3, 1
+ pmaddwd m1, [r5]
+ movu xm3, [r0 + r4] ; m3 = row 3
+ punpckhwd xm4, xm2, xm3
+ punpcklwd xm2, xm3
+ vinserti128 m2, m2, xm4, 1
+ pmaddwd m4, m2, [r5 + 1 * mmsize]
+ pmaddwd m2, [r5]
+ paddd m0, m4 ; res row0 done(0,1,2,3)
+ lea r0, [r0 + r1 * 4]
+ movu xm4, [r0] ; m4 = row 4
+ punpckhwd xm5, xm3, xm4
+ punpcklwd xm3, xm4
+ vinserti128 m3, m3, xm5, 1
+ pmaddwd m5, m3, [r5 + 1 * mmsize]
+ pmaddwd m3, [r5]
+ paddd m1, m5 ;res row1 done(1, 2, 3, 4)
+ movu xm5, [r0 + r1] ; m5 = row 5
+ punpckhwd xm6, xm4, xm5
+ punpcklwd xm4, xm5
+ vinserti128 m4, m4, xm6, 1
+ pmaddwd m6, m4, [r5 + 1 * mmsize]
+ pmaddwd m4, [r5]
+ paddd m2, m6 ;res row2 done(2,3,4,5)
+ movu xm6, [r0 + r1 * 2] ; m6 = row 6
+ punpckhwd xm7, xm5, xm6
+ punpcklwd xm5, xm6
+ vinserti128 m5, m5, xm7, 1
+ pmaddwd m7, m5, [r5 + 1 * mmsize]
+ pmaddwd m5, [r5]
+ paddd m3, m7 ;res row3 done(3,4,5,6)
+ movu xm7, [r0 + r4] ; m7 = row 7
+ punpckhwd xm8, xm6, xm7
+ punpcklwd xm6, xm7
+ vinserti128 m6, m6, xm8, 1
+ pmaddwd m8, m6, [r5 + 1 * mmsize]
+ pmaddwd m6, [r5]
+ paddd m4, m8 ;res row4 done(4,5,6,7)
+ lea r0, [r0 + r1 * 4]
+ movu xm8, [r0] ; m8 = row 8
+ punpckhwd xm9, xm7, xm8
+ punpcklwd xm7, xm8
+ vinserti128 m7, m7, xm9, 1
+ pmaddwd m9, m7, [r5 + 1 * mmsize]
+ pmaddwd m7, [r5]
+ paddd m5, m9 ;res row5 done(5,6,7,8)
+ movu xm9, [r0 + r1] ; m9 = row 9
+ punpckhwd xm10, xm8, xm9
+ punpcklwd xm8, xm9
+ vinserti128 m8, m8, xm10, 1
+ pmaddwd m8, [r5 + 1 * mmsize]
+ paddd m6, m8 ;res row6 done(6,7,8,9)
+ movu xm10, [r0 + r1 * 2] ; m10 = row 10
+ punpckhwd xm8, xm9, xm10
+ punpcklwd xm9, xm10
+ vinserti128 m9, m9, xm8, 1
+ pmaddwd m9, [r5 + 1 * mmsize]
+ paddd m7, m9 ;res row7 done 7,8,9,10
+ lea r4, [r3 * 3]
+%ifnidn %1,ss
+ paddd m0, m11
+ paddd m1, m11
+ paddd m2, m11
+ paddd m3, m11
+%endif
+ psrad m0, %3
+ psrad m1, %3
+ psrad m2, %3
+ psrad m3, %3
+ packssdw m0, m1
+ packssdw m2, m3
+ vpermq m0, m0, q3120
+ vpermq m2, m2, q3120
+ pxor m1, m1
+ mova m3, [pw_pixel_max]
+%if %2
+ CLIPW m0, m1, m3
+ CLIPW m2, m1, m3
+%endif
+ vextracti128 xm9, m0, 1
+ vextracti128 xm8, m2, 1
+ movu [r2], xm0
+ movu [r2 + r3], xm9
+ movu [r2 + r3 * 2], xm2
+ movu [r2 + r4], xm8
+%ifnidn %1,ss
+ paddd m4, m11
+ paddd m5, m11
+ paddd m6, m11
+ paddd m7, m11
+%endif
+ psrad m4, %3
+ psrad m5, %3
+ psrad m6, %3
+ psrad m7, %3
+ packssdw m4, m5
+ packssdw m6, m7
+ vpermq m4, m4, q3120
+ vpermq m6, m6, q3120
+%if %2
+ CLIPW m4, m1, m3
+ CLIPW m6, m1, m3
+%endif
+ vextracti128 xm5, m4, 1
+ vextracti128 xm7, m6, 1
+ lea r2, [r2 + r3 * 4]
+ movu [r2], xm4
+ movu [r2 + r3], xm5
+ movu [r2 + r3 * 2], xm6
+ movu [r2 + r4], xm7
+ RET
+%endif
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_8x8 pp, 1, 6
+FILTER_VER_CHROMA_AVX2_8x8 ps, 0, 2
+FILTER_VER_CHROMA_AVX2_8x8 sp, 1, 10
+FILTER_VER_CHROMA_AVX2_8x8 ss, 0, 6
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