[x265] [PATCH 6 of 6] asm: 10bpp sse4 code for saoCuOrgB0, improved 173346c->23127c over C code

dnyaneshwar at multicorewareinc.com dnyaneshwar at multicorewareinc.com
Mon Jun 22 14:50:38 CEST 2015


# HG changeset patch
# User Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
# Date 1434973065 -19800
#      Mon Jun 22 17:07:45 2015 +0530
# Node ID f282fc4d8915ec712f3915f387fc6018481fd467
# Parent  a946a0178f57e65c02e6be2d9c6485c58658fe20
asm: 10bpp sse4 code for saoCuOrgB0, improved 173346c->23127c over C code

diff -r a946a0178f57 -r f282fc4d8915 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Jun 22 16:06:52 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Jun 22 17:07:45 2015 +0530
@@ -1096,6 +1096,7 @@
         p.saoCuOrgE2[1] = PFX(saoCuOrgE2_sse4);
         p.saoCuOrgE3[0] = PFX(saoCuOrgE3_sse4);
         p.saoCuOrgE3[1] = PFX(saoCuOrgE3_sse4);
+        p.saoCuOrgB0 = PFX(saoCuOrgB0_sse4);
 
         LUMA_ADDAVG(sse4);
         CHROMA_420_ADDAVG(sse4);
diff -r a946a0178f57 -r f282fc4d8915 source/common/x86/loopfilter.asm
--- a/source/common/x86/loopfilter.asm	Mon Jun 22 16:06:52 2015 +0530
+++ b/source/common/x86/loopfilter.asm	Mon Jun 22 17:07:45 2015 +0530
@@ -1144,6 +1144,56 @@
 ; void saoCuOrgB0(pixel* rec, const pixel* offset, int lcuWidth, int lcuHeight, int stride)
 ;=====================================================================================
 INIT_XMM sse4
+%if HIGH_BIT_DEPTH
+cglobal saoCuOrgB0, 5,7,8
+    add         r4d, r4d
+
+    shr         r2d, 4
+    movu        m3, [r1]            ; offset[0-15]
+    movu        m4, [r1 + 16]       ; offset[16-31]
+    pxor        m7, m7
+
+.loopH
+    mov         r5d, r2d
+    xor         r6,  r6
+
+.loopW
+    movu        m2, [r0 + r6]
+    movu        m5, [r0 + r6 + 16]
+    psrlw       m0, m2, 5
+    psrlw       m6, m5, 5
+    packuswb    m0, m6
+    pand        m0, [pb_31]         ; m0 = [index]
+
+    pshufb      m6, m3, m0
+    pshufb      m1, m4, m0
+    pcmpgtb     m0, [pb_15]         ; m0 = [mask]
+
+    pblendvb    m6, m6, m1, m0      ; NOTE: don't use 3 parameters style, x264 macro have some bug!
+
+    pmovsxbw    m0, m6              ; offset
+    punpckhbw   m6, m6
+    psraw       m6, 8
+
+    paddw       m2, m0
+    paddw       m5, m6
+    pmaxsw      m2, m7
+    pmaxsw      m5, m7
+    pminsw      m2, [pw_1023]
+    pminsw      m5, [pw_1023]
+
+    movu        [r0 + r6], m2
+    movu        [r0 + r6 + 16], m5
+    add         r6d, 32
+    dec         r5d
+    jnz         .loopW
+
+    lea         r0, [r0 + r4]
+
+    dec         r3d
+    jnz         .loopH
+    RET
+%else ; HIGH_BIT_DEPTH
 cglobal saoCuOrgB0, 4, 7, 8
 
     mov         r3d, r3m
@@ -1189,6 +1239,7 @@
     dec         r3d
     jnz         .loopH
     RET
+%endif
 
 INIT_YMM avx2
 cglobal saoCuOrgB0, 4, 7, 8
diff -r a946a0178f57 -r f282fc4d8915 source/test/pixelharness.cpp
--- a/source/test/pixelharness.cpp	Mon Jun 22 16:06:52 2015 +0530
+++ b/source/test/pixelharness.cpp	Mon Jun 22 17:07:45 2015 +0530
@@ -1285,8 +1285,8 @@
     ALIGN_VAR_16(pixel, ref_dest[64 * 64]);
     ALIGN_VAR_16(pixel, opt_dest[64 * 64]);
 
-    memset(ref_dest, 0xCD, sizeof(ref_dest));
-    memset(opt_dest, 0xCD, sizeof(opt_dest));
+    for (int i = 0; i < 64 * 64; i++)
+        ref_dest[i] = opt_dest[i] = rand() % (PIXEL_MAX);
 
     int j = 0;
 


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