[x265] [PATCH] asm:intra pred planar4 sse2 high bit

[dave]

The sse4 intra pred planar4 is actually sse2 so this is the same thing 
with a few minor tweaks.  There's probably more room for improvement of 
the sse4 version with ssse3+ instructions.
On 03/03/2015 06:47 PM, dtyx265 at gmail.com wrote:
> # HG changeset patch
> # User David T Yuen <dtyx265 at gmail.com>
> # Date 1425437029 28800
> # Node ID bf095f7deed80f741663edae2b3a90bb4f63a980
> # Parent  79c396c5cd8e990528a67ad029be55a4ff1f723e
> asm:intra pred planar4 sse2 high bit
>
> This replaces c code for systems using ssse3 to sse2 processors
> The code is backported from intrapred planar4 sse4 high bit
>
> ./test/TestBench --testbench intrapred | grep intra_planar_4x4
> intra_planar_4x4	1.31x 	 434.94   	 569.95
>
> diff -r 79c396c5cd8e -r bf095f7deed8 source/common/x86/asm-primitives.cpp
> --- a/source/common/x86/asm-primitives.cpp	Tue Mar 03 09:58:40 2015 -0800
> +++ b/source/common/x86/asm-primitives.cpp	Tue Mar 03 18:43:49 2015 -0800
> @@ -873,6 +873,8 @@
>           p.cu[BLOCK_16x16].intra_pred[DC_IDX] = x265_intra_pred_dc16_sse2;
>           p.cu[BLOCK_32x32].intra_pred[DC_IDX] = x265_intra_pred_dc32_sse2;
>   
> +        p.cu[BLOCK_4x4].intra_pred[PLANAR_IDX] = x265_intra_pred_planar4_sse2;
> +
>           p.cu[BLOCK_4x4].sse_ss = x265_pixel_ssd_ss_4x4_mmx2;
>           ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);
>   
> diff -r 79c396c5cd8e -r bf095f7deed8 source/common/x86/intrapred16.asm
> --- a/source/common/x86/intrapred16.asm	Tue Mar 03 09:58:40 2015 -0800
> +++ b/source/common/x86/intrapred16.asm	Tue Mar 03 18:43:49 2015 -0800
> @@ -447,6 +447,55 @@
>   %endrep
>       RET
>   
> +;---------------------------------------------------------------------------------------
> +; void intra_pred_planar(pixel* dst, intptr_t dstStride, pixel*srcPix, int, int filter)
> +;---------------------------------------------------------------------------------------
> +INIT_XMM sse2
> +cglobal intra_pred_planar4, 3,3,5
> +    movu            m1, [r2 + 2]
> +    movu            m2, [r2 + 18]
> +    pshufhw         m3, m1, 0               ; topRight
> +    pshufd          m3, m3, 0xAA
> +    pshufhw         m4, m2, 0               ; bottomLeft
> +    pshufd          m4, m4, 0xAA
> +
> +    pmullw          m3, [multi_2Row]        ; (x + 1) * topRight
> +    pmullw          m0, m1, [pw_planar4_1]  ; (blkSize - 1 - y) * above[x]
> +
> +    paddw           m3, [pw_4]
> +    paddw           m3, m4
> +    paddw           m3, m0
> +    psubw           m4, m1
> +
> +    pshuflw         m1, m2, 0
> +    pmullw          m1, [pw_planar4_0]
> +    paddw           m1, m3
> +    paddw           m3, m4
> +    psraw           m1, 3
> +    movh            [r0], m1
> +
> +    pshuflw         m1, m2, 01010101b
> +    pmullw          m1, [pw_planar4_0]
> +    paddw           m1, m3
> +    paddw           m3, m4
> +    psraw           m1, 3
> +    movh            [r0 + r1 * 2], m1
> +    lea             r0, [r0 + 4 * r1]
> +
> +    pshuflw         m1, m2, 10101010b
> +    pmullw          m1, [pw_planar4_0]
> +    paddw           m1, m3
> +    paddw           m3, m4
> +    psraw           m1, 3
> +    movh            [r0], m1
> +
> +    pshuflw         m1, m2, 11111111b
> +    pmullw          m1, [pw_planar4_0]
> +    paddw           m1, m3
> +    psraw           m1, 3
> +    movh            [r0 + r1 * 2], m1
> +    RET
> +
>   ;-----------------------------------------------------------------------------------
>   ; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* above, int, int filter)
>   ;-----------------------------------------------------------------------------------