[x265] [PATCH] asm:intra pred planar8 sse2 high bit
chen
chenm003 at 163.com
Thu Mar 5 01:40:22 CET 2015
right
At 2015-03-05 07:54:17,dtyx265 at gmail.com wrote:
># HG changeset patch
># User David T Yuen <dtyx265 at gmail.com>
># Date 1425513096 28800
># Node ID 243cb00021a3bbc3184cbc2b27a5dbe56d745c51
># Parent bf095f7deed80f741663edae2b3a90bb4f63a980
>asm:intra pred planar8 sse2 high bit
>
>This replaces c code for systems using ssse3 to sse2 processors
>The code is backported from intrapred planar8 sse4 high bit
>
>./test/TestBench --testbench intrapred | grep intra_planar_8x8
>intra_planar_8x8 3.52x 897.48 3158.02
>
>note: The sse4 code that this is based on only uses up to sse2 and can probably be improved
>
>diff -r bf095f7deed8 -r 243cb00021a3 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Tue Mar 03 18:43:49 2015 -0800
>+++ b/source/common/x86/asm-primitives.cpp Wed Mar 04 15:51:36 2015 -0800
>@@ -874,6 +874,7 @@
> p.cu[BLOCK_32x32].intra_pred[DC_IDX] = x265_intra_pred_dc32_sse2;
>
> p.cu[BLOCK_4x4].intra_pred[PLANAR_IDX] = x265_intra_pred_planar4_sse2;
>+ p.cu[BLOCK_8x8].intra_pred[PLANAR_IDX] = x265_intra_pred_planar8_sse2;
>
> p.cu[BLOCK_4x4].sse_ss = x265_pixel_ssd_ss_4x4_mmx2;
> ALL_LUMA_CU(sse_ss, pixel_ssd_ss, sse2);
>diff -r bf095f7deed8 -r 243cb00021a3 source/common/x86/intrapred16.asm
>--- a/source/common/x86/intrapred16.asm Tue Mar 03 18:43:49 2015 -0800
>+++ b/source/common/x86/intrapred16.asm Wed Mar 04 15:51:36 2015 -0800
>@@ -496,6 +496,57 @@
> movh [r0 + r1 * 2], m1
> RET
>
>+;---------------------------------------------------------------------------------------
>+; void intra_pred_planar(pixel* dst, intptr_t dstStride, pixel*srcPix, int, int filter)
>+;---------------------------------------------------------------------------------------
>+INIT_XMM sse2
>+cglobal intra_pred_planar8, 3,3,5
>+ movu m1, [r2 + 2]
>+ movu m2, [r2 + 34]
>+
>+ movd m3, [r2 + 18] ; topRight = above[8];
>+ movd m4, [r2 + 50] ; bottomLeft = left[8];
>+
>+ pshuflw m3, m3, 0
>+ pshuflw m4, m4, 0
>+ pshufd m3, m3, 0 ; v_topRight
>+ pshufd m4, m4, 0 ; v_bottomLeft
>+
>+ pmullw m3, [multiL] ; (x + 1) * topRight
>+ pmullw m0, m1, [pw_planar8_1] ; (blkSize - 1 - y) * above[x]
>+ paddw m3, [pw_8]
>+ paddw m3, m4
>+ paddw m3, m0
>+ psubw m4, m1
>+
>+%macro INTRA_PRED_PLANAR_8 1
>+%if (%1 < 4)
>+ pshuflw m1, m2, 0x55 * %1
>+ pshufd m1, m1, 0
>+%else
>+ pshufhw m1, m2, 0x55 * (%1 - 4)
>+ pshufd m1, m1, 0xAA
>+%endif
>+ pmullw m1, [pw_planar8_0]
>+ paddw m1, m3
>+ psraw m1, 4
>+ movu [r0], m1
>+%if (%1 < 7)
>+ paddw m3, m4
>+ lea r0, [r0 + r1 * 2]
>+%endif
>+%endmacro
>+
>+ INTRA_PRED_PLANAR_8 0
>+ INTRA_PRED_PLANAR_8 1
>+ INTRA_PRED_PLANAR_8 2
>+ INTRA_PRED_PLANAR_8 3
>+ INTRA_PRED_PLANAR_8 4
>+ INTRA_PRED_PLANAR_8 5
>+ INTRA_PRED_PLANAR_8 6
>+ INTRA_PRED_PLANAR_8 7
>+ RET
>+
> ;-----------------------------------------------------------------------------------
> ; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel* above, int, int filter)
> ;-----------------------------------------------------------------------------------
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