[x265] [PATCH] asm:intra pred planar8 sse2

dave dtyx265 at gmail.com
Thu Mar 5 03:54:29 CET 2015


On 03/04/2015 06:44 PM, chen wrote:
>
> At 2015-03-05 10:03:59,dave <dtyx265 at gmail.com> wrote:
>
>     On 03/04/2015 04:39 PM, chen wrote:
>>     At 2015-03-05 07:54:02,dtyx265 at gmail.com  wrote:
>>     ># HG changeset patch
>>     ># User David T Yuen<dtyx265 at gmail.com>
>>     ># Date 1425512599 28800
>>     ># Node ID 16880e791046ef8470f8307b76aae57c3be573c1
>>     ># Parent  c53b456ad909eeab8d83f8e0817e641d174cc706
>>     >asm:intra pred planar8 sse2
>>     >
>>     >This replaces c code for systems using ssse3 to sse2 processors
>>     >The code is backported from intrapred planar8 sse4
>>     >
>>     >64-bit
>>     >
>>     >./test/TestBench --testbench intrapred | grep intra_planar_8x8
>>     >intra_planar_8x8	3.34x 	 997.49   	 3330.22
>>     >
>>     >32-bit
>>     >
>>     >./test/TestBench --testbench intrapred | grep intra_planar_8x8
>>     >intra_planar_8x8	3.87x 	 1052.48  	 4072.68
>>     >
>>     >diff -r c53b456ad909 -r 16880e791046 source/common/x86/asm-primitives.cpp
>>     >--- a/source/common/x86/asm-primitives.cpp	Tue Mar 03 18:40:21 2015 -0800
>>     >+++ b/source/common/x86/asm-primitives.cpp	Wed Mar 04 15:43:19 2015 -0800
>>     >@@ -1210,6 +1210,7 @@
>>     >         p.cu[BLOCK_32x32].intra_pred[DC_IDX] = x265_intra_pred_dc32_sse2;
>>     >
>>     >         p.cu[BLOCK_4x4].intra_pred[PLANAR_IDX] = x265_intra_pred_planar4_sse2;
>>     >+        p.cu[BLOCK_8x8].intra_pred[PLANAR_IDX] = x265_intra_pred_planar8_sse2;
>>     >
>>     >         p.cu[BLOCK_4x4].calcresidual = x265_getResidual4_sse2;
>>     >         p.cu[BLOCK_8x8].calcresidual = x265_getResidual8_sse2;
>>     >diff -r c53b456ad909 -r 16880e791046 source/common/x86/intrapred.h
>>     >--- a/source/common/x86/intrapred.h	Tue Mar 03 18:40:21 2015 -0800
>>     >+++ b/source/common/x86/intrapred.h	Wed Mar 04 15:43:19 2015 -0800
>>     >@@ -36,6 +36,7 @@
>>     > void x265_intra_pred_dc32_sse4(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int filter);
>>     >
>>     > void x265_intra_pred_planar4_sse2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int);
>>     >+void x265_intra_pred_planar8_sse2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int);
>>     > void x265_intra_pred_planar4_sse4(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int);
>>     > void x265_intra_pred_planar8_sse4(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int);
>>     > void x265_intra_pred_planar16_sse4(pixel* dst, intptr_t dstStride, const pixel* srcPix, int, int);
>>     >diff -r c53b456ad909 -r 16880e791046 source/common/x86/intrapred8.asm
>>     >--- a/source/common/x86/intrapred8.asm	Tue Mar 03 18:40:21 2015 -0800
>>     >+++ b/source/common/x86/intrapred8.asm	Wed Mar 04 15:43:19 2015 -0800
>>     >@@ -124,6 +124,7 @@
>>     > cextern pw_32
>>     > cextern pw_257
>>     > cextern pw_1024
>>     >+cextern pw_00ff
>>     > cextern pb_unpackbd1
>>     > cextern multiL
>>     > cextern multiH
>>     >@@ -588,6 +589,63 @@
>>     >     movd            [r0 + r1], m1
>>     >     RET
>>     >
>>     >+;---------------------------------------------------------------------------------------
>>     >+; void intra_pred_planar(pixel* dst, intptr_t dstStride, pixel*srcPix, int, int filter)
>>     >+;---------------------------------------------------------------------------------------
>>     >+INIT_XMM sse2
>>     >+cglobal intra_pred_planar8, 3,3,6
>>     >+    pxor            m0, m0
>>     >+    movh            m1, [r2 + 1]
>>     >+    punpcklbw       m1, m0
>>     >+    movh            m2, [r2 + 17]
>>     >+    punpcklbw       m2, m0
>>     >+
>>     >+    movd            m3, [r2 + 9]            ; topRight   = above[8];
>>     >+    movd            m4, [r2 + 25]           ; bottomLeft = left[8];
>>     >+
>>     >+    pand            m3, [pw_00ff]
>>     >+    pand            m4, [pw_00ff]
>>     how about mov+and+movd? it is less cycles on documents
>>
>     something like this?
>
>         mov             r3d, [r2 + 9]
>         mov             r4d, [r2 + 25]
>         and             r3d, [pw_00ff]
>         and             r4d, [pw_00ff]
>         movd            m3, r3d
>         movd            m4, r4d
>
>     [MC] why not movzx?
>
Better than mov+and+movd but not much

./test/TestBench --testbench intrapred | grep intra_planar_8x8
intra_planar_8x8    3.18x      1049.99       3335.82
>
>     btw: and may use immediate constant 0xFF, otherthan memory constant
>
also slightly better..

./test/TestBench --testbench intrapred | grep intra_planar_8x8
intra_planar_8x8    3.18x      1049.99       3335.84

I think it's the movement between general purpose and simd registers 
that's slowing it down.
>
>
>     This performs slightly worse on my system
>
>     ./test/TestBench --testbench intrapred | grep intra_planar_8x8
>     intra_planar_8x8    3.15x      1059.98       3335.38
>
>>     >+    pshuflw         m3, m3, 0x00
>>     >+    pshuflw         m4, m4, 0x00
>>     >+    pshufd          m3, m3, 0x44
>>     >+    pshufd          m4, m4, 0x44
>>     >+
>>     >+    pmullw          m3, [multiL]            ; (x + 1) * topRight
>>     >+    pmullw          m0, m1, [pw_planar8_1]  ; (blkSize - 1 - y) * above[x]
>>     >+    paddw           m3, [pw_8]
>>     >+    paddw           m3, m4
>>     >+    paddw           m3, m0
>>     >+    psubw           m4, m1
>>     >+
>>     >+%macro INTRA_PRED_PLANAR_8 1
>>     >+%if (%1 < 4)
>>     >+    pshuflw         m5, m2, 0x55 * %1
>>     >+    pshufd          m5, m5, 0
>>     >+%else
>>     >+    pshufhw         m5, m2, 0x55 * (%1 - 4)
>>     >+    pshufd          m5, m5, 0xAA
>>     >+%endif
>>     >+    pmullw          m5, [pw_planar8_0]
>>     >+    paddw           m5, m3
>>     >+    psraw           m5, 4
>>     >+    packuswb        m5, m5
>>     >+    movh            [r0], m5
>>     >+%if (%1 < 7)
>>     >+    paddw           m3, m4
>>     >+    lea             r0, [r0 + r1]
>>     >+%endif
>>     >+%endmacro
>>     >+
>>     >+    INTRA_PRED_PLANAR_8 0
>>     >+    INTRA_PRED_PLANAR_8 1
>>     >+    INTRA_PRED_PLANAR_8 2
>>     >+    INTRA_PRED_PLANAR_8 3
>>     >+    INTRA_PRED_PLANAR_8 4
>>     >+    INTRA_PRED_PLANAR_8 5
>>     >+    INTRA_PRED_PLANAR_8 6
>>     >+    INTRA_PRED_PLANAR_8 7
>>     >+    RET
>>     >+
>>     > ;---------------------------------------------------------------------------------------------
>>     > ; void intra_pred_dc(pixel* dst, intptr_t dstStride, pixel *srcPix, int dirMode, int bFilter)
>>     > ;---------------------------------------------------------------------------------------------
>>     >_______________________________________________
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>>
>>
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>
>
>
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