[x265] [PATCH] asm-avx2: filter_vpp[4x16], filter_vps[4x16]: 786c->590c, 651c->489c
Divya Manivannan
divya at multicorewareinc.com
Thu Mar 5 10:39:07 CET 2015
# HG changeset patch
# User Divya Manivannan <divya at multicorewareinc.com>
# Date 1425548284 -19800
# Thu Mar 05 15:08:04 2015 +0530
# Node ID dc38f1755137e00af00e358bffa9dedc710a2916
# Parent 18ad0c966f4ae87b8ff8cf1b486a94a94d2edb5a
asm-avx2: filter_vpp[4x16], filter_vps[4x16]: 786c->590c, 651c->489c
diff -r 18ad0c966f4a -r dc38f1755137 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu Mar 05 13:37:48 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu Mar 05 15:08:04 2015 +0530
@@ -1587,6 +1587,7 @@
p.pu[LUMA_16x32].luma_hps = x265_interp_8tap_horiz_ps_16x32_avx2;
p.pu[LUMA_16x64].luma_hps = x265_interp_8tap_horiz_ps_16x64_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x16].filter_vpp = x265_interp_4tap_vert_pp_4x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vpp = x265_interp_4tap_vert_pp_16x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_vpp = x265_interp_4tap_vert_pp_16x12_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_vpp = x265_interp_4tap_vert_pp_32x32_avx2;
@@ -1594,6 +1595,7 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x16].filter_vpp = x265_interp_4tap_vert_pp_32x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x8].filter_vpp = x265_interp_4tap_vert_pp_32x8_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x16].filter_vps = x265_interp_4tap_vert_ps_4x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_vps = x265_interp_4tap_vert_ps_16x12_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_vps = x265_interp_4tap_vert_ps_32x32_avx2;
diff -r 18ad0c966f4a -r dc38f1755137 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Thu Mar 05 13:37:48 2015 +0530
+++ b/source/common/x86/ipfilter8.asm Thu Mar 05 15:08:04 2015 +0530
@@ -2773,6 +2773,151 @@
FILTER_VER_CHROMA_AVX2_4x8 pp
FILTER_VER_CHROMA_AVX2_4x8 ps
+%macro FILTER_VER_CHROMA_AVX2_4x16 1
+INIT_YMM avx2
+%if ARCH_X86_64 == 1
+cglobal interp_4tap_vert_%1_4x16, 4, 6, 9
+ mov r4d, r4m
+ shl r4d, 6
+ sub r0, r1
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffVer_32]
+ add r5, r4
+%else
+ lea r5, [tab_ChromaCoeffVer_32 + r4]
+%endif
+
+ lea r4, [r1 * 3]
+
+ movd xm1, [r0]
+ pinsrd xm1, [r0 + r1], 1
+ pinsrd xm1, [r0 + r1 * 2], 2
+ pinsrd xm1, [r0 + r4], 3 ; m1 = row[3 2 1 0]
+ lea r0, [r0 + r1 * 4]
+ movd xm2, [r0]
+ pinsrd xm2, [r0 + r1], 1
+ pinsrd xm2, [r0 + r1 * 2], 2
+ pinsrd xm2, [r0 + r4], 3 ; m2 = row[7 6 5 4]
+ vinserti128 m1, m1, xm2, 1 ; m1 = row[7 6 5 4 3 2 1 0]
+ lea r0, [r0 + r1 * 4]
+ movd xm3, [r0]
+ pinsrd xm3, [r0 + r1], 1
+ pinsrd xm3, [r0 + r1 * 2], 2
+ pinsrd xm3, [r0 + r4], 3 ; m3 = row[11 10 9 8]
+ vinserti128 m2, m2, xm3, 1 ; m2 = row[11 10 9 8 7 6 5 4]
+ lea r0, [r0 + r1 * 4]
+ movd xm4, [r0]
+ pinsrd xm4, [r0 + r1], 1
+ pinsrd xm4, [r0 + r1 * 2], 2
+ pinsrd xm4, [r0 + r4], 3 ; m4 = row[15 14 13 12]
+ vinserti128 m3, m3, xm4, 1 ; m3 = row[15 14 13 12 11 10 9 8]
+ lea r0, [r0 + r1 * 4]
+ movd xm5, [r0]
+ pinsrd xm5, [r0 + r1], 1
+ pinsrd xm5, [r0 + r1 * 2], 2 ; m5 = row[x 18 17 16]
+ vinserti128 m4, m4, xm5, 1 ; m4 = row[x 18 17 16 15 14 13 12]
+ mova m5, [interp4_vpp_shuf1]
+ vpermd m0, m5, m1 ; m0 = row[4 3 3 2 2 1 1 0]
+ vpermd m6, m5, m2 ; m6 = row[8 7 7 6 6 5 5 4]
+ vpermd m7, m5, m3 ; m7 = row[12 11 11 10 10 9 9 8]
+ vpermd m8, m5, m4 ; m8 = row[16 15 15 14 14 13 13 12]
+ mova m5, [interp4_vpp_shuf1 + mmsize]
+ vpermd m1, m5, m1 ; m1 = row[6 5 5 4 4 3 3 2]
+ vpermd m2, m5, m2 ; m2 = row[10 9 9 8 8 7 7 6]
+ vpermd m3, m5, m3 ; m3 = row[14 13 13 12 12 11 11 10]
+ vpermd m4, m5, m4 ; m4 = row[18 17 17 16 16 15 15 14]
+
+ mova m5, [interp4_vpp_shuf]
+ pshufb m0, m0, m5
+ pshufb m1, m1, m5
+ pshufb m2, m2, m5
+ pshufb m4, m4, m5
+ pshufb m3, m3, m5
+ pshufb m6, m6, m5
+ pshufb m7, m7, m5
+ pshufb m8, m8, m5
+ pmaddubsw m0, [r5]
+ pmaddubsw m6, [r5]
+ pmaddubsw m7, [r5]
+ pmaddubsw m8, [r5]
+ pmaddubsw m1, [r5 + mmsize]
+ pmaddubsw m2, [r5 + mmsize]
+ pmaddubsw m3, [r5 + mmsize]
+ pmaddubsw m4, [r5 + mmsize]
+ paddw m0, m1 ; m0 = WORD ROW[3 2 1 0]
+ paddw m6, m2 ; m6 = WORD ROW[7 6 5 4]
+ paddw m7, m3 ; m7 = WORD ROW[11 10 9 8]
+ paddw m8, m4 ; m8 = WORD ROW[15 14 13 12]
+%ifidn %1,pp
+ mova m5, [pw_512]
+ pmulhrsw m0, m5
+ pmulhrsw m6, m5
+ pmulhrsw m7, m5
+ pmulhrsw m8, m5
+ packuswb m0, m6
+ packuswb m7, m8
+ vextracti128 xm1, m0, 1
+ vextracti128 xm2, m7, 1
+ lea r5, [r3 * 3]
+ movd [r2], xm0
+ pextrd [r2 + r3], xm0, 1
+ movd [r2 + r3 * 2], xm1
+ pextrd [r2 + r5], xm1, 1
+ lea r2, [r2 + r3 * 4]
+ pextrd [r2], xm0, 2
+ pextrd [r2 + r3], xm0, 3
+ pextrd [r2 + r3 * 2], xm1, 2
+ pextrd [r2 + r5], xm1, 3
+ lea r2, [r2 + r3 * 4]
+ movd [r2], xm7
+ pextrd [r2 + r3], xm7, 1
+ movd [r2 + r3 * 2], xm2
+ pextrd [r2 + r5], xm2, 1
+ lea r2, [r2 + r3 * 4]
+ pextrd [r2], xm7, 2
+ pextrd [r2 + r3], xm7, 3
+ pextrd [r2 + r3 * 2], xm2, 2
+ pextrd [r2 + r5], xm2, 3
+%else
+ add r3d, r3d
+ mova m5, [pw_2000]
+ psubw m0, m5
+ psubw m6, m5
+ psubw m7, m5
+ psubw m8, m5
+ vextracti128 xm1, m0, 1
+ vextracti128 xm2, m6, 1
+ vextracti128 xm3, m7, 1
+ vextracti128 xm4, m8, 1
+ lea r5, [r3 * 3]
+ movq [r2], xm0
+ movhps [r2 + r3], xm0
+ movq [r2 + r3 * 2], xm1
+ movhps [r2 + r5], xm1
+ lea r2, [r2 + r3 * 4]
+ movq [r2], xm6
+ movhps [r2 + r3], xm6
+ movq [r2 + r3 * 2], xm2
+ movhps [r2 + r5], xm2
+ lea r2, [r2 + r3 * 4]
+ movq [r2], xm7
+ movhps [r2 + r3], xm7
+ movq [r2 + r3 * 2], xm3
+ movhps [r2 + r5], xm3
+ lea r2, [r2 + r3 * 4]
+ movq [r2], xm8
+ movhps [r2 + r3], xm8
+ movq [r2 + r3 * 2], xm4
+ movhps [r2 + r5], xm4
+%endif
+ RET
+%endif
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_4x16 pp
+FILTER_VER_CHROMA_AVX2_4x16 ps
+
;-----------------------------------------------------------------------------
; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------
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