[x265] [PATCH] aasm-avx2: intra_pred_ang8_27, 41.42x
chen
chenm003 at 163.com
Thu Mar 5 22:13:59 CET 2015
At 2015-03-05 20:51:42,praveen at multicorewareinc.com wrote:
># HG changeset patch
># User Praveen Tiwari <praveen at multicorewareinc.com>
># Date 1425559881 -19800
># Node ID 4deeb4cd656ad7166317f6bd8eeb3fa82154cd39
># Parent 60f49deb3fa58bc35ba6e0557259433c01ee43e6
>aasm-avx2: intra_pred_ang8_27, 41.42x
>
>intra_ang_8x8[27] 41.42x 370.06 15326.56
>
>diff -r 60f49deb3fa5 -r 4deeb4cd656a source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Thu Mar 05 16:06:04 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp Thu Mar 05 18:21:21 2015 +0530
>@@ -1510,6 +1510,7 @@
> p.cu[BLOCK_8x8].intra_pred[29] = x265_intra_pred_ang8_29_avx2;
> p.cu[BLOCK_8x8].intra_pred[8] = x265_intra_pred_ang8_8_avx2;
> p.cu[BLOCK_8x8].intra_pred[28] = x265_intra_pred_ang8_28_avx2;
>+ p.cu[BLOCK_8x8].intra_pred[27] = x265_intra_pred_ang8_27_avx2;
>
> // copy_sp primitives
> p.cu[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;
>diff -r 60f49deb3fa5 -r 4deeb4cd656a source/common/x86/intrapred.h
>--- a/source/common/x86/intrapred.h Thu Mar 05 16:06:04 2015 +0530
>+++ b/source/common/x86/intrapred.h Thu Mar 05 18:21:21 2015 +0530
>@@ -173,6 +173,7 @@
> void x265_intra_pred_ang8_29_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
> void x265_intra_pred_ang8_8_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
> void x265_intra_pred_ang8_28_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
>+void x265_intra_pred_ang8_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
> void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
> void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
> void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
>diff -r 60f49deb3fa5 -r 4deeb4cd656a source/common/x86/intrapred8.asm
>--- a/source/common/x86/intrapred8.asm Thu Mar 05 16:06:04 2015 +0530
>+++ b/source/common/x86/intrapred8.asm Thu Mar 05 18:21:21 2015 +0530
>@@ -2,6 +2,7 @@
> ;* Copyright (C) 2013 x265 project
> ;*
> ;* Authors: Min Chen <chenm003 at 163.com> <min.chen at multicorewareinc.com>
>+;* Praveen Kumar Tiwari <praveen at multicorewareinc.com>
> ;*
> ;* This program is free software; you can redistribute it and/or modify
> ;* it under the terms of the GNU General Public License as published by
>@@ -95,6 +96,11 @@
> c_ang8_25_30: db 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30
> c_ang8_3_8: db 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8
>
>+c_ang8_2_4: db 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4, 28, 4
>+c_ang8_6_8: db 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 26, 6, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8
>+c_ang8_10_12: db 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12
>+c_ang8_14_16: db 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
>+
> ;; (blkSize - 1 - x)
> pw_planar4_0: dw 3, 2, 1, 0, 3, 2, 1, 0
> pw_planar4_1: dw 3, 3, 3, 3, 3, 3, 3, 3
>@@ -32975,3 +32981,39 @@
> movhps [r0 + 2 * r1], xm4
> movhps [r0 + r3], xm2
> RET
>+
>+INIT_YMM avx2
>+cglobal intra_pred_ang8_27, 3, 4, 6
>+ mova m3, [pw_1024]
>+ vbroadcasti128 m0, [r2 + 1]
>+ movu m5, [c_ang8_src1_9_1_9]
>+
>+ pshufb m1, m0, m5
>+ pshufb m2, m0, m5
>+ pshufb m4, m0, m5
>+ pshufb m0, m5
why calculate same result 4 times?
>+
>+ pmaddubsw m1, [c_ang8_2_4]
>+ pmulhrsw m1, m3
>+ pmaddubsw m2, [c_ang8_6_8]
>+ pmulhrsw m2, m3
>+ pmaddubsw m4, [c_ang8_10_12]
>+ pmulhrsw m4, m3
>+ pmaddubsw m0, [c_ang8_14_16]
we have free register, so buffer table address in it and access by register index mode ( [rN] ) may faster and less code size
>+ pmulhrsw m0, m3
>+ packuswb m1, m2
>+ packuswb m4, m0
>+
>+ lea r3, [3 * r1]
>+ movq [r0], xm1
>+ vextracti128 xm2, m1, 1
>+ movq [r0 + r1], xm2
>+ movhps [r0 + 2 * r1], xm1
>+ movhps [r0 + r3], xm2
>+ lea r0, [r0 + 4 * r1]
>+ movq [r0], xm4
>+ vextracti128 xm2, m4, 1
>+ movq [r0 + r1], xm2
>+ movhps [r0 + 2 * r1], xm4
>+ movhps [r0 + r3], xm2
>+ RET
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