[x265] [PATCH] asm-avx2: filter_vpp[2x8], filter_vps[2x8]: 490c->368c, 438c->298c
Divya Manivannan
divya at multicorewareinc.com
Fri Mar 6 07:52:57 CET 2015
# HG changeset patch
# User Divya Manivannan <divya at multicorewareinc.com>
# Date 1425624678 -19800
# Fri Mar 06 12:21:18 2015 +0530
# Node ID 2ba603ed8ef0f60b59ff3281dbf0b63856ca852b
# Parent 1738a545c24bee479c763625eee6592ac0e963b2
asm-avx2: filter_vpp[2x8], filter_vps[2x8]: 490c->368c, 438c->298c
diff -r 1738a545c24b -r 2ba603ed8ef0 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Mar 06 11:07:20 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Fri Mar 06 12:21:18 2015 +0530
@@ -1574,6 +1574,7 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x16].filter_vpp = x265_interp_4tap_vert_pp_4x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_2x4].filter_vpp = x265_interp_4tap_vert_pp_2x4_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_2x8].filter_vpp = x265_interp_4tap_vert_pp_2x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vpp = x265_interp_4tap_vert_pp_4x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x8].filter_vpp = x265_interp_4tap_vert_pp_4x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_vpp = x265_interp_4tap_vert_pp_6x8_avx2;
@@ -1590,6 +1591,7 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_vpp = x265_interp_4tap_vert_pp_32x32_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_2x4].filter_vps = x265_interp_4tap_vert_ps_2x4_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_2x8].filter_vps = x265_interp_4tap_vert_ps_2x8_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_vps = x265_interp_4tap_vert_ps_4x2_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_vps = x265_interp_4tap_vert_ps_4x4_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_4x8].filter_vps = x265_interp_4tap_vert_ps_4x8_avx2;
diff -r 1738a545c24b -r 2ba603ed8ef0 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Fri Mar 06 11:07:20 2015 +0530
+++ b/source/common/x86/ipfilter8.asm Fri Mar 06 12:21:18 2015 +0530
@@ -35,8 +35,8 @@
const interp4_vpp_shuf, times 2 db 0, 4, 1, 5, 2, 6, 3, 7, 8, 12, 9, 13, 10, 14, 11, 15
ALIGN 32
-const interp_vert_shuf, db 0, 2, 1, 3, 2, 4, 3, 5, 4, 6, 5, 7, 6, 8, 7, 9
- db 4, 6, 5, 7, 6, 8, 7, 9, 8, 10, 9, 11, 10, 12, 11, 13
+const interp_vert_shuf, times 2 db 0, 2, 1, 3, 2, 4, 3, 5, 4, 6, 5, 7, 6, 8, 7, 9
+ times 2 db 4, 6, 5, 7, 6, 8, 7, 9, 8, 10, 9, 11, 10, 12, 11, 13
ALIGN 32
const interp4_vpp_shuf1, dd 0, 1, 1, 2, 2, 3, 3, 4
@@ -2344,7 +2344,7 @@
pinsrw xm1, [r0 + r1 * 2], 6
pshufb xm0, xm1, [interp_vert_shuf]
- pshufb xm1, [interp_vert_shuf + 16]
+ pshufb xm1, [interp_vert_shuf + 32]
vinserti128 m0, m0, xm1, 1
pmaddubsw m0, [r5]
vextracti128 xm1, m0, 1
@@ -2372,6 +2372,78 @@
FILTER_VER_CHROMA_AVX2_2x4 pp
FILTER_VER_CHROMA_AVX2_2x4 ps
+%macro FILTER_VER_CHROMA_AVX2_2x8 1
+INIT_YMM avx2
+cglobal interp_4tap_vert_%1_2x8, 4, 6, 2
+ mov r4d, r4m
+ shl r4d, 6
+ sub r0, r1
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffVer_32]
+ add r5, r4
+%else
+ lea r5, [tab_ChromaCoeffVer_32 + r4]
+%endif
+
+ lea r4, [r1 * 3]
+
+ pinsrw xm1, [r0], 0
+ pinsrw xm1, [r0 + r1], 1
+ pinsrw xm1, [r0 + r1 * 2], 2
+ pinsrw xm1, [r0 + r4], 3
+ lea r0, [r0 + r1 * 4]
+ pinsrw xm1, [r0], 4
+ pinsrw xm1, [r0 + r1], 5
+ pinsrw xm1, [r0 + r1 * 2], 6
+ pinsrw xm1, [r0 + r4], 7
+ movhlps xm0, xm1
+ lea r0, [r0 + r1 * 4]
+ pinsrw xm0, [r0], 4
+ pinsrw xm0, [r0 + r1], 5
+ pinsrw xm0, [r0 + r1 * 2], 6
+ vinserti128 m1, m1, xm0, 1
+
+ pshufb m0, m1, [interp_vert_shuf]
+ pshufb m1, [interp_vert_shuf + 32]
+ pmaddubsw m0, [r5]
+ pmaddubsw m1, [r5 + 1 * mmsize]
+ paddw m0, m1
+%ifidn %1,pp
+ pmulhrsw m0, [pw_512]
+ vextracti128 xm1, m0, 1
+ packuswb xm0, xm1
+ lea r4, [r3 * 3]
+ pextrw [r2], xm0, 0
+ pextrw [r2 + r3], xm0, 1
+ pextrw [r2 + r3 * 2], xm0, 2
+ pextrw [r2 + r4], xm0, 3
+ lea r2, [r2 + r3 * 4]
+ pextrw [r2], xm0, 4
+ pextrw [r2 + r3], xm0, 5
+ pextrw [r2 + r3 * 2], xm0, 6
+ pextrw [r2 + r4], xm0, 7
+%else
+ add r3d, r3d
+ lea r4, [r3 * 3]
+ psubw m0, [pw_2000]
+ vextracti128 xm1, m0, 1
+ movd [r2], xm0
+ pextrd [r2 + r3], xm0, 1
+ pextrd [r2 + r3 * 2], xm0, 2
+ pextrd [r2 + r4], xm0, 3
+ lea r2, [r2 + r3 * 4]
+ movd [r2], xm1
+ pextrd [r2 + r3], xm1, 1
+ pextrd [r2 + r3 * 2], xm1, 2
+ pextrd [r2 + r4], xm1, 3
+%endif
+ RET
+%endmacro
+
+FILTER_VER_CHROMA_AVX2_2x8 pp
+FILTER_VER_CHROMA_AVX2_2x8 ps
+
;-----------------------------------------------------------------------------
; void interp_4tap_vert_pp_2x8(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------
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