[x265] [PATCH] asm-avx2: intra_pred_ang8_24, (40.05x)

[praveen at multicorewareinc.com]

# HG changeset patch
# User Praveen Tiwari <praveen at multicorewareinc.com>
# Date 1425633836 -19800
# Node ID 2da3a6431f94e1dce3c6bc739e7c457f90b12369
# Parent  25b01a20389e8e4297e004d500871263ca349d15
asm-avx2: intra_pred_ang8_24, (40.05x)

intra_ang_8x8[24]       40.05x   244.28          9782.73

diff -r 25b01a20389e -r 2da3a6431f94 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Fri Mar 06 13:20:29 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Fri Mar 06 14:53:56 2015 +0530
@@ -1514,6 +1514,7 @@
         p.cu[BLOCK_8x8].intra_pred[27] = x265_intra_pred_ang8_27_avx2;
         p.cu[BLOCK_8x8].intra_pred[11] = x265_intra_pred_ang8_11_avx2;
         p.cu[BLOCK_8x8].intra_pred[25] = x265_intra_pred_ang8_25_avx2;
+        p.cu[BLOCK_8x8].intra_pred[24] = x265_intra_pred_ang8_24_avx2;
 
         // copy_sp primitives
         p.cu[BLOCK_16x16].copy_sp = x265_blockcopy_sp_16x16_avx2;
diff -r 25b01a20389e -r 2da3a6431f94 source/common/x86/intrapred.h
--- a/source/common/x86/intrapred.h	Fri Mar 06 13:20:29 2015 +0530
+++ b/source/common/x86/intrapred.h	Fri Mar 06 14:53:56 2015 +0530
@@ -177,6 +177,7 @@
 void x265_intra_pred_ang8_27_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_11_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_intra_pred_ang8_25_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
+void x265_intra_pred_ang8_24_avx2(pixel* dst, intptr_t dstStride, const pixel* srcPix, int dirMode, int bFilter);
 void x265_all_angs_pred_4x4_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
 void x265_all_angs_pred_8x8_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
 void x265_all_angs_pred_16x16_sse4(pixel *dest, pixel *refPix, pixel *filtPix, int bLuma);
diff -r 25b01a20389e -r 2da3a6431f94 source/common/x86/intrapred8.asm
--- a/source/common/x86/intrapred8.asm	Fri Mar 06 13:20:29 2015 +0530
+++ b/source/common/x86/intrapred8.asm	Fri Mar 06 14:53:56 2015 +0530
@@ -105,6 +105,11 @@
                          10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, \
                          14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 14, 18, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16
 
+c_ang8_mode_24:       db 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 5, 27, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, 10, 22, \
+                         15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 15, 17, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, 20, 12, \
+                         25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 25, 7, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, 30, 2, \
+                         3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 3, 29, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24, 8, 24
+
 ;; (blkSize - 1 - x)
 pw_planar4_0:         dw 3,  2,  1,  0,  3,  2,  1,  0
 pw_planar4_1:         dw 3,  3,  3,  3,  3,  3,  3,  3
@@ -33145,3 +33150,41 @@
     movhps            [r0 + 2 * r1], xm4
     movhps            [r0 + r3], xm2
     RET
+
+INIT_YMM avx2
+cglobal intra_pred_ang8_24, 3, 5, 6
+    mova              m3, [pw_1024]
+    vbroadcasti128    m0, [r2]
+    movu              m5, [c_ang8_src1_9_1_9]
+
+    pshufb            m0, m5
+
+    lea               r4, [c_ang8_mode_24]
+    pmaddubsw         m1, m0, [r4]
+    pmulhrsw          m1, m3
+    pmaddubsw         m2, m0, [r4 + mmsize]
+    pmulhrsw          m2, m3
+    pmaddubsw         m4, m0, [r4 + 2 * mmsize]
+    pmulhrsw          m4, m3
+    pslldq            xm0, 2
+    pinsrb            xm0, [r2 + 16 + 6], 0
+    pinsrb            xm0, [r2 + 0], 1
+    vinserti128       m0, m0, xm0, 1
+    pmaddubsw         m0, [r4 + 3 * mmsize]
+    pmulhrsw          m0, m3
+    packuswb          m1, m2
+    packuswb          m4, m0
+
+    lea               r3, [3 * r1]
+    movq              [r0], xm1
+    vextracti128      xm2, m1, 1
+    movq              [r0 + r1], xm2
+    movhps            [r0 + 2 * r1], xm1
+    movhps            [r0 + r3], xm2
+    lea               r0, [r0 + 4 * r1]
+    movq              [r0], xm4
+    vextracti128      xm2, m4, 1
+    movq              [r0 + r1], xm2
+    movhps            [r0 + 2 * r1], xm4
+    movhps            [r0 + r3], xm2
+    RET