[x265] [PATCH] chroma_hps[8x8] for i420 avx2 asm: 629c->503c
chen
chenm003 at 163.com
Mon Mar 9 22:21:38 CET 2015
At 2015-03-09 18:39:50,aasaipriya at multicorewareinc.com wrote:
># HG changeset patch
># User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
># Date 1425897572 -19800
># Mon Mar 09 16:09:32 2015 +0530
># Node ID 516877467b23101b718e5f62397f52d3014c81bb
># Parent 06b67c917202b50c2aa7f4f5c4e0cf7f94b56145
>chroma_hps[8x8] for i420 avx2 asm: 629c->503c
>
>diff -r 06b67c917202 -r 516877467b23 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Mon Mar 09 16:06:02 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp Mon Mar 09 16:09:32 2015 +0530
>@@ -1792,6 +1792,7 @@
> p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_hpp = x265_interp_4tap_horiz_pp_16x16_avx2;
>
> p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_hps = x265_interp_4tap_horiz_ps_4x4_avx2;
>+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_hps = x265_interp_4tap_horiz_ps_8x8_avx2;
>
> p.pu[LUMA_4x4].luma_vps = x265_interp_8tap_vert_ps_4x4_avx2;
>
>diff -r 06b67c917202 -r 516877467b23 source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm Mon Mar 09 16:06:02 2015 +0530
>+++ b/source/common/x86/ipfilter8.asm Mon Mar 09 16:09:32 2015 +0530
>@@ -1803,6 +1803,79 @@
> movhps [r2], xm3
> .end
> RET
>+
>+INIT_YMM avx2
>+cglobal interp_4tap_horiz_ps_8x8, 4,7,6
>+ mov r4d, r4m
>+ mov r5d, r5m
>+ add r3d, r3d
>+
>+%ifdef PIC
>+ lea r6, [tab_ChromaCoeff]
>+ vpbroadcastd m0, [r6 + r4 * 4]
>+%else
>+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 4]
>+%endif
>+
>+ vbroadcasti128 m2, [pw_1]
>+ vbroadcasti128 m5, [pw_2000]
>+ mova m1, [tab_Tm]
>+
>+ ; register map
>+ ; m0 - interpolate coeff
>+ ; m1 - shuffle order table
>+ ; m2 - constant word 1
>+
>+ mov r6d, 8
>+ mov r4d, 0
why not xor?
>+ dec r0
>+ test r5d, r5d
>+ je .loop
>+ sub r0 , r1
>+ add r6d , 2 ;3-1=2 (1 row separte in last)
>+
>+.loop
>+ add r4d, 2
>+ ; Row 0
>+ vbroadcasti128 m3, [r0]
>+ pshufb m3, m1
>+ pmaddubsw m3, m0
>+ pmaddwd m3, m2
>+
>+ ; Row 1
>+ vbroadcasti128 m4, [r0 + r1]
>+ pshufb m4, m1
>+ pmaddubsw m4, m0
>+ pmaddwd m4, m2
>+
>+ packssdw m3, m4
>+ psubw m3, m5
>+
>+ vpermq m3, m3, 11011000b
>+ vextracti128 xm4, m3, 1
>+ movu [r2], xm3
>+ movu [r2 + r3], xm4
>+
>+ lea r2, [r2 + r3 * 2]
>+ lea r0, [r0 + r1 * 2]
>+ cmp r4d, r6d
why not sub on r6 to reduce one control register?
>+ jnz .loop
>+ test r5d, r5d
if you modify logic on r6, you may use je to replace check on r5
>+ jz .end
>+
>+ ;Row 11
>+ vbroadcasti128 m3, [r0]
>+ pshufb m3, m1
>+ pmaddubsw m3, m0
>+ pmaddwd m3, m2
>+
>+ packssdw m3, m3
>+ psubw m3, m5
>+ vpermq m3, m3, 11011000b
>+ vextracti128 xm4, m3, 1
>+ movu [r2], xm3
>+.end
>+ RET
> ;-----------------------------------------------------------------------------------------------------------------------------
> ;void interp_horiz_ps_c(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx, int isRowExt)
> ;-----------------------------------------------------------------------------------------------------------------------------
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