[x265] Fwd: [PATCH] asm: avx2 code for sad[32x32] for 8bpp

Praveen Tiwari praveen at multicorewareinc.com
Wed Mar 11 10:11:19 CET 2015


---------- Forwarded message ----------
From: <sumalatha at multicorewareinc.com>
Date: Wed, Mar 11, 2015 at 2:24 PM
Subject: [x265] [PATCH] asm: avx2 code for sad[32x32] for 8bpp
To: x265-devel at videolan.org


# HG changeset patch
# User Sumalatha Polureddy<sumalatha at multicorewareinc.com>
# Date 1426064050 -19800
# Node ID 01bfd365bf5f5317874b5c0315736ca76176f3df
# Parent  800f8ecd1e7393756f4bb58e536497162dc32150
asm: avx2 code for sad[32x32] for 8bpp

>>SSE3
>>sad[32x32]  230.81x          745.76          172131.92

>>AVX2
>>sad[32x32]  330.38x          496.68          164091.02


Are you comparing the debug mode performance numbers? 230.81x  ???

SSE3
sad[32x32]  31.96x   770.39          24623.33

on i7-4770k CPU. Please check the issue.


diff -r 800f8ecd1e73 -r 01bfd365bf5f source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp      Tue Mar 10 10:49:11 2015
+0530
+++ b/source/common/x86/asm-primitives.cpp      Wed Mar 11 14:24:10 2015
+0530
@@ -1442,6 +1442,8 @@
         p.pu[LUMA_8x16].satd  = x265_pixel_satd_8x16_avx2;
         p.pu[LUMA_8x8].satd   = x265_pixel_satd_8x8_avx2;

+        p.pu[LUMA_32x32].sad = x265_pixel_sad_32x32_avx2;
+
         p.pu[LUMA_8x4].sad_x3 = x265_pixel_sad_x3_8x4_avx2;
         p.pu[LUMA_8x8].sad_x3 = x265_pixel_sad_x3_8x8_avx2;
         p.pu[LUMA_8x16].sad_x3 = x265_pixel_sad_x3_8x16_avx2;
diff -r 800f8ecd1e73 -r 01bfd365bf5f source/common/x86/sad-a.asm
--- a/source/common/x86/sad-a.asm       Tue Mar 10 10:49:11 2015 +0530
+++ b/source/common/x86/sad-a.asm       Wed Mar 11 14:24:10 2015 +0530
@@ -3897,5 +3897,31 @@
     movq            [r6 + 8], xm1
     RET

+INIT_YMM avx2
+cglobal pixel_sad_32x32, 4,4,5
+    xorps           m0, m0
+%assign x 0
+%rep 16
+    movu           m1, [r0]               ; row 0 of pix0
+    movu           m2, [r2]               ; row 0 of pix1
+    movu           m3, [r0 + r1]          ; row 1 of pix0
+    movu           m4, [r2 + r3]          ; row 1 of pix1
+
+    psadbw         m1, m2
+    psadbw         m3, m4
+    paddd          m0, m1
+    paddd          m0, m3
+%assign x x+1
+  %if x < 16
+    lea     r2,     [r2 + 2 * r3]
+    lea     r0,     [r0 + 2 * r1]
+  %endif
+%endrep
+    vextracti128   xm1, m0, 1
+    paddd          xm0, xm1
+    pshufd         xm1, xm0, 2
+    paddd          xm0,xm1
+    movd           eax, xm0
+    RET

 %endif
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