[x265] [PATCH] asm : chroma_hps[4x2] for i420 avx2 - improved 329c->233c
chen
chenm003 at 163.com
Thu Mar 12 01:04:20 CET 2015
right
we may improve it in future, the 4x2=8 pixels, so we may fill all of pixel in one ZMM register
At 2015-03-11 19:15:22,aasaipriya at multicorewareinc.com wrote:
># HG changeset patch
># User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
># Date 1426072515 -19800
># Wed Mar 11 16:45:15 2015 +0530
># Node ID c24cc7f55a051768331e3854c41aef404f572c24
># Parent c076f0195a36f278f99967756426526816c18273
>asm : chroma_hps[4x2] for i420 avx2 - improved 329c->233c
>
>diff -r c076f0195a36 -r c24cc7f55a05 source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp Wed Mar 11 15:30:50 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp Wed Mar 11 16:45:15 2015 +0530
>@@ -1591,6 +1591,8 @@
> p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_hps = x265_interp_4tap_horiz_ps_4x4_avx2;
> p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_hps = x265_interp_4tap_horiz_ps_8x8_avx2;
>
>+ p.chroma[X265_CSP_I420].pu[CHROMA_420_4x2].filter_hps = x265_interp_4tap_horiz_ps_4x2_avx2;
>+
> p.chroma[X265_CSP_I422].pu[CHROMA_422_4x4].filter_vpp = x265_interp_4tap_vert_pp_4x4_avx2;
>
> p.chroma[X265_CSP_I420].pu[CHROMA_420_4x4].filter_vpp = x265_interp_4tap_vert_pp_4x4_avx2;
>diff -r c076f0195a36 -r c24cc7f55a05 source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm Wed Mar 11 15:30:50 2015 +0530
>+++ b/source/common/x86/ipfilter8.asm Wed Mar 11 16:45:15 2015 +0530
>@@ -14854,6 +14854,74 @@
> .end
> RET
>
>+cglobal interp_4tap_horiz_ps_4x2, 4,7,5
>+ mov r4d, r4m
>+ mov r5d, r5m
>+ add r3d, r3d
>+
>+%ifdef PIC
>+ lea r6, [tab_ChromaCoeff]
>+ vpbroadcastd m0, [r6 + r4 * 4]
>+%else
>+ vpbroadcastd m0, [tab_ChromaCoeff + r4 * 4]
>+%endif
>+
>+ vbroadcasti128 m2, [pw_1]
>+ vbroadcasti128 m1, [tab_Tm]
>+
>+ ; register map
>+ ; m0 - interpolate coeff
>+ ; m1 - shuffle order table
>+ ; m2 - constant word 1
>+
>+ dec r0
>+ test r5d, r5d
>+ je .label
>+ sub r0 , r1
>+
>+.label
>+ ; Row 0-1
>+ movu xm3, [r0]
>+ vinserti128 m3, m3, [r0 + r1], 1
>+ pshufb m3, m1
>+ pmaddubsw m3, m0
>+ pmaddwd m3, m2
>+
>+ packssdw m3, m3
>+ psubw m3, [pw_2000]
>+ vextracti128 xm4, m3, 1
>+ movq [r2], xm3
>+ movq [r2+r3], xm4
>+
>+ test r5d, r5d
>+ jz .end
>+ lea r2, [r2 + r3 * 2]
>+ lea r0, [r0 + r1 * 2]
>+
>+ ;Row 2-3
>+ movu xm3, [r0]
>+ vinserti128 m3, m3, [r0 + r1], 1
>+ pshufb m3, m1
>+ pmaddubsw m3, m0
>+ pmaddwd m3, m2
>+
>+ ; Row 5
>+ lea r0, [r0 + r1 * 2]
>+ vbroadcasti128 m4, [r0] ; [x x x x x A 9 8 7 6 5 4 3 2 1 0]
>+ pshufb m4, m1
>+ pmaddubsw m4, m0
>+ pmaddwd m4, m2
>+
>+ packssdw m3, m4
>+ psubw m3, [pw_2000]
>+
>+ vextracti128 xm4, m3, 1
>+ movq [r2], xm3
>+ movq [r2+r3], xm4
>+ lea r2, [r2 + r3 * 2]
>+ movhps [r2], xm3
>+.end
>+ RET
> ;-----------------------------------------------------------------------------------------------------------------------------
> ; void interp_4tap_horiz_ps_8x8(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx, int isRowExt)
> ;-----------------------------------------------------------------------------------------------------------------------------;
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