[x265] [PATCH] asm: luma_hpp[24x32] avx2 - improved 6186c->5068c

[chen]

right
 
in future, we can buffer address of [tab_Tm] into r5, it may reduce code size and improve speed

At 2015-03-17 12:39:09,aasaipriya at multicorewareinc.com wrote:
># HG changeset patch
># User Aasaipriya Chandran <aasaipriya at multicorewareinc.com>
># Date 1426567142 -19800
>#      Tue Mar 17 10:09:02 2015 +0530
># Node ID 4e7713b3baba922a60c267efa4032e37dc6bc521
># Parent  b9948752d5516a72eeaf824e3ee6f0feb097381c
>asm: luma_hpp[24x32] avx2 - improved 6186c->5068c
>
>diff -r b9948752d551 -r 4e7713b3baba source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp	Mon Mar 16 20:40:12 2015 -0500
>+++ b/source/common/x86/asm-primitives.cpp	Tue Mar 17 10:09:02 2015 +0530
>@@ -1567,6 +1567,8 @@
>         p.pu[LUMA_64x16].luma_hpp = x265_interp_8tap_horiz_pp_64x16_avx2;
>         p.pu[LUMA_48x64].luma_hpp = x265_interp_8tap_horiz_pp_48x64_avx2;
> 
>+        p.pu[LUMA_24x32].luma_hpp = x265_interp_8tap_horiz_pp_24x32_avx2;
>+
>         p.pu[LUMA_4x4].luma_hps = x265_interp_8tap_horiz_ps_4x4_avx2;
>         p.pu[LUMA_4x8].luma_hps = x265_interp_8tap_horiz_ps_4x8_avx2;
>         p.pu[LUMA_4x16].luma_hps = x265_interp_8tap_horiz_ps_4x16_avx2;
>diff -r b9948752d551 -r 4e7713b3baba source/common/x86/ipfilter8.asm
>--- a/source/common/x86/ipfilter8.asm	Mon Mar 16 20:40:12 2015 -0500
>+++ b/source/common/x86/ipfilter8.asm	Tue Mar 17 10:09:02 2015 +0530
>@@ -17363,3 +17363,68 @@
> 
> IPFILTER_CHROMA_PP_4xN_AVX2  4 , 8
> IPFILTER_CHROMA_PP_4xN_AVX2  4 , 16
>+
>+INIT_YMM avx2
>+cglobal interp_8tap_horiz_pp_24x32, 4,6,8
>+    sub               r0,         3
>+    mov               r4d,        r4m
>+%ifdef PIC
>+    lea               r5,         [tab_LumaCoeff]
>+    vpbroadcastd      m0,         [r5 + r4 * 8]
>+    vpbroadcastd      m1,         [r5 + r4 * 8 + 4]
>+%else
>+    vpbroadcastd      m0,         [tab_LumaCoeff + r4 * 8]
>+    vpbroadcastd      m1,         [tab_LumaCoeff + r4 * 8 + 4]
>+%endif
>+    movu              m3,         [tab_Tm + 16]
>+    vpbroadcastd      m7,         [pw_1]
>+
>+    ; register map
>+    ; m0 , m1 interpolate coeff
>+    ; m2 , m2  shuffle order table
>+    ; m7 - pw_1
>+
>+    mov               r4d,        32
>+.loop:
>+    ; Row 0
>+    vbroadcasti128    m4,         [r0]                        ; [x E D C B A 9 8 7 6 5 4 3 2 1 0]
>+    pshufb            m5,         m4,     m3
>+    pshufb            m4,         [tab_Tm]
>+    pmaddubsw         m4,         m0
>+    pmaddubsw         m5,         m1
>+    paddw             m4,         m5
>+    pmaddwd           m4,         m7
>+
>+    vbroadcasti128    m5,         [r0 + 8]
>+    pshufb            m6,         m5,     m3
>+    pshufb            m5,         [tab_Tm]
>+    pmaddubsw         m5,         m0
>+    pmaddubsw         m6,         m1
>+    paddw             m5,         m6
>+    pmaddwd           m5,         m7
>+    packssdw          m4,         m5                          ; [17 16 15 14 07 06 05 04 13 12 11 10 03 02 01 00]
>+    pmulhrsw          m4,         [pw_512]
>+
>+    vbroadcasti128    m2,         [r0 + 16]
>+    pshufb            m5,         m2,     m3
>+    pshufb            m2,         [tab_Tm]
>+    pmaddubsw         m2,         m0
>+    pmaddubsw         m5,         m1
>+    paddw             m2,         m5
>+    pmaddwd           m2,         m7
>+
>+    packssdw          m2,         m2
>+    pmulhrsw          m2,         [pw_512]
>+    packuswb          m4,         m2
>+    vpermq            m4,         m4,     11011000b
>+    vextracti128      xm5,        m4,     1
>+    pshufd            xm4,        xm4,    11011000b
>+    pshufd            xm5,        xm5,    11011000b
>+
>+    movu              [r2],       xm4
>+    movq              [r2 + 16],  xm5
>+    add               r0,         r1
>+    add               r2,         r3
>+    dec               r4d
>+    jnz               .loop
>+    RET
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