[x265] [PATCH] asm: interp_4tap_vert_pp sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Sat May 9 04:14:52 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431137669 25200
# Node ID 1a6ce5886cdbf56024464532f48045a31f097d83
# Parent 81a0388ef700c1e773c1b9af3a500c515e27bcc3
asm: interp_4tap_vert_pp sse2
This code replaces c code for 8x8, 8x12, 8x16, 8x32 and 8x64
64-bit
./test/TestBench --testbench interp | grep vpp | grep " 8x"
chroma_vpp[ 8x8] 4.07x 2009.95 8188.89
chroma_vpp[ 8x16] 4.07x 3989.99 16231.35
chroma_vpp[ 8x32] 4.05x 7909.96 32071.44
chroma_vpp[ 8x12] 4.06x 3022.50 12270.46
chroma_vpp[ 8x64] 4.07x 15745.53 64057.47
diff -r 81a0388ef700 -r 1a6ce5886cdb source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri May 08 13:55:02 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Fri May 08 19:14:29 2015 -0700
@@ -1389,9 +1389,21 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vpp = x265_interp_4tap_vert_pp_8x2_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x6].filter_vpp = x265_interp_4tap_vert_pp_8x6_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_8x32].filter_vpp = x265_interp_4tap_vert_pp_8x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vpp = x265_interp_4tap_vert_pp_6x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x12].filter_vpp = x265_interp_4tap_vert_pp_8x12_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x32].filter_vpp = x265_interp_4tap_vert_pp_8x32_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_8x64].filter_vpp = x265_interp_4tap_vert_pp_8x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_8x32].filter_vpp = x265_interp_4tap_vert_pp_8x32_sse2;
#endif
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r 81a0388ef700 -r 1a6ce5886cdb source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Fri May 08 13:55:02 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Fri May 08 19:14:29 2015 -0700
@@ -1734,6 +1734,149 @@
%endif
;-----------------------------------------------------------------------------
+; void interp_4tap_vert_pp_%1x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W8_H8_H16_H32_sse2 2
+INIT_XMM sse2
+cglobal interp_4tap_vert_pp_%1x%2, 4, 6, 11
+
+ mov r4d, r4m
+ sub r0, r1
+ shl r4d, 5
+ pxor m9, m9
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffV]
+ mova m6, [r5 + r4]
+ mova m5, [r5 + r4 + 16]
+%else
+ mova m6, [tab_ChromaCoeff + r4]
+ mova m5, [tab_ChromaCoeff + r4 + 16]
+%endif
+
+ mova m4, [pw_32]
+ lea r5, [r1 * 3]
+
+%assign x 1
+%rep %2/4
+ movq m0, [r0]
+ movq m1, [r0 + r1]
+ movq m2, [r0 + 2 * r1]
+ movq m3, [r0 + r5]
+
+ punpcklbw m0, m1
+ punpcklbw m1, m2
+ punpcklbw m2, m3
+
+ movhlps m7, m0
+ punpcklbw m0, m9
+ punpcklbw m7, m9
+ pmaddwd m0, m6
+ pmaddwd m7, m6
+ packssdw m0, m7
+
+ movhlps m8, m2
+ movq m7, m2
+ punpcklbw m8, m9
+ punpcklbw m7, m9
+ pmaddwd m8, m5
+ pmaddwd m7, m5
+ packssdw m7, m8
+
+ paddw m0, m7
+ paddw m0, m4
+ psraw m0, 6
+
+ lea r0, [r0 + 4 * r1]
+ movq m10, [r0]
+ punpcklbw m3, m10
+
+ movhlps m8, m1
+ punpcklbw m1, m9
+ punpcklbw m8, m9
+ pmaddwd m1, m6
+ pmaddwd m8, m6
+ packssdw m1, m8
+
+ movhlps m8, m3
+ movq m7, m3
+ punpcklbw m8, m9
+ punpcklbw m7, m9
+ pmaddwd m8, m5
+ pmaddwd m7, m5
+ packssdw m7, m8
+
+ paddw m1, m7
+ paddw m1, m4
+ psraw m1, 6
+
+ packuswb m0, m1
+ movh [r2], m0
+ movhps [r2 + r3], m0
+
+ movq m1, [r0 + r1]
+ punpcklbw m10, m1
+
+ movhlps m8, m2
+ punpcklbw m2, m9
+ punpcklbw m8, m9
+ pmaddwd m2, m6
+ pmaddwd m8, m6
+ packssdw m2, m8
+
+ movhlps m8, m10
+ punpcklbw m10, m9
+ punpcklbw m8, m9
+ pmaddwd m10, m5
+ pmaddwd m8, m5
+ packssdw m10, m8
+
+ paddw m2, m10
+ paddw m2, m4
+ psraw m2, 6
+
+ movq m7, [r0 + 2 * r1]
+ punpcklbw m1, m7
+
+ movhlps m8, m3
+ punpcklbw m3, m9
+ punpcklbw m8, m9
+ pmaddwd m3, m6
+ pmaddwd m8, m6
+ packssdw m3, m8
+
+ movhlps m8, m1
+ punpcklbw m1, m9
+ punpcklbw m8, m9
+ pmaddwd m1, m5
+ pmaddwd m8, m5
+ packssdw m1, m8
+
+ paddw m3, m1
+ paddw m3, m4
+ psraw m3, 6
+
+ packuswb m2, m3
+ lea r2, [r2 + 2 * r3]
+ movh [r2], m2
+ movhps [r2 + r3], m2
+%if x < %2/4
+ lea r2, [r2 + 2 * r3]
+%endif
+%endrep
+ RET
+%endmacro
+
+%if ARCH_X86_64
+ FILTER_V4_W8_H8_H16_H32_sse2 8, 8
+ FILTER_V4_W8_H8_H16_H32_sse2 8, 16
+ FILTER_V4_W8_H8_H16_H32_sse2 8, 32
+
+ FILTER_V4_W8_H8_H16_H32_sse2 8, 12
+ FILTER_V4_W8_H8_H16_H32_sse2 8, 64
+%endif
+
+;-----------------------------------------------------------------------------
; void interp_4tap_horiz_pp_2x4(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------
INIT_XMM sse4
diff -r 81a0388ef700 -r 1a6ce5886cdb source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Fri May 08 13:55:02 2015 -0700
+++ b/source/common/x86/ipfilter8.h Fri May 08 19:14:29 2015 -0700
@@ -919,6 +919,11 @@
void x265_interp_4tap_vert_pp_8x2_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_8x4_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_8x6_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x8_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x12_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x16_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x32_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_8x64_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
#endif
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
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