[x265] [PATCH 3 of 3] asm: interp_4tap_vert_pp sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Tue May 12 03:41:45 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431394769 25200
# Node ID 7c523bee141534fa2e896aeb7b7e1727ee8f6480
# Parent 7a81847ae6a2b1a00c2f3f2eb00ba8ed0a475958
asm: interp_4tap_vert_pp sse2
This replaces c code for 24x32 and 24x64
64_bit
./test/TestBench --testbench interp | grep vpp | grep "\[24x"
chroma_vpp[24x32] 7.41x 24623.48 182517.88
chroma_vpp[24x64] 7.39x 49337.02 364733.53
chroma_vpp[24x32] 7.41x 24622.11 182386.27
diff -r 7a81847ae6a2 -r 7c523bee1415 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Mon May 11 18:27:53 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Mon May 11 18:39:29 2015 -0700
@@ -1398,6 +1398,7 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_vpp = x265_interp_4tap_vert_pp_16x12_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vpp = x265_interp_4tap_vert_pp_16x16_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_vpp = x265_interp_4tap_vert_pp_16x32_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_24x32].filter_vpp = x265_interp_4tap_vert_pp_24x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vpp = x265_interp_4tap_vert_pp_6x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
@@ -1412,6 +1413,7 @@
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x24].filter_vpp = x265_interp_4tap_vert_pp_16x24_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x32].filter_vpp = x265_interp_4tap_vert_pp_16x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x64].filter_vpp = x265_interp_4tap_vert_pp_16x64_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_24x64].filter_vpp = x265_interp_4tap_vert_pp_24x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vpp = x265_interp_4tap_vert_pp_8x4_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_vpp = x265_interp_4tap_vert_pp_8x8_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_vpp = x265_interp_4tap_vert_pp_8x16_sse2;
@@ -1423,6 +1425,7 @@
p.chroma[X265_CSP_I444].pu[LUMA_16x16].filter_vpp = x265_interp_4tap_vert_pp_16x16_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_16x32].filter_vpp = x265_interp_4tap_vert_pp_16x32_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_vpp = x265_interp_4tap_vert_pp_16x64_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_24x32].filter_vpp = x265_interp_4tap_vert_pp_24x32_sse2;
#endif
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r 7a81847ae6a2 -r 7c523bee1415 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Mon May 11 18:27:53 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Mon May 11 18:39:29 2015 -0700
@@ -1981,6 +1981,202 @@
FILTER_V4_W16_H2_sse2 64
%endif
+;-----------------------------------------------------------------------------
+;void interp_4tap_vert_pp_24xN(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W24_sse2 1
+INIT_XMM sse2
+cglobal interp_4tap_vert_pp_24x%1, 4, 6, 11
+
+ mov r4d, r4m
+ sub r0, r1
+ shl r4d, 5
+ pxor m9, m9
+ mova m6, [pw_32]
+
+%ifdef PIC
+ lea r5, [tab_ChromaCoeffV]
+ mova m1, [r5 + r4]
+ mova m0, [r5 + r4 + 16]
+%else
+ mova m1, [tab_ChromaCoeffV + r4]
+ mova m0, [tab_ChromaCoeffV + r4 + 16]
+%endif
+
+%assign x 1
+%rep %1/2
+ movu m2, [r0]
+ movu m3, [r0 + r1]
+
+ punpcklbw m4, m2, m3
+ punpckhbw m2, m3
+
+ movhlps m8, m4
+ punpcklbw m4, m9
+ punpcklbw m8, m9
+ pmaddwd m4, m1
+ pmaddwd m8, m1
+ packssdw m4, m8
+
+ movhlps m8, m2
+ punpcklbw m2, m9
+ punpcklbw m8, m9
+ pmaddwd m2, m1
+ pmaddwd m8, m1
+ packssdw m2, m8
+
+ lea r5, [r0 + 2 * r1]
+ movu m5, [r5]
+ movu m10, [r5 + r1]
+ punpcklbw m7, m5, m10
+
+ movhlps m8, m7
+ punpcklbw m7, m9
+ punpcklbw m8, m9
+ pmaddwd m7, m0
+ pmaddwd m8, m0
+ packssdw m7, m8
+ paddw m4, m7
+
+ punpckhbw m7, m5, m10
+
+ movhlps m8, m7
+ punpcklbw m7, m9
+ punpcklbw m8, m9
+ pmaddwd m7, m0
+ pmaddwd m8, m0
+ packssdw m7, m8
+
+ paddw m2, m7
+
+ paddw m4, m6
+ psraw m4, 6
+ paddw m2, m6
+ psraw m2, 6
+
+ packuswb m4, m2
+ movu [r2], m4
+
+ punpcklbw m4, m3, m5
+ punpckhbw m3, m5
+
+ movhlps m8, m4
+ punpcklbw m4, m9
+ punpcklbw m8, m9
+ pmaddwd m4, m1
+ pmaddwd m8, m1
+ packssdw m4, m8
+
+ movhlps m8, m3
+ punpcklbw m3, m9
+ punpcklbw m8, m9
+ pmaddwd m3, m1
+ pmaddwd m8, m1
+ packssdw m3, m8
+
+ movu m2, [r5 + 2 * r1]
+
+ punpcklbw m5, m10, m2
+ punpckhbw m10, m2
+
+ movhlps m8, m5
+ punpcklbw m5, m9
+ punpcklbw m8, m9
+ pmaddwd m5, m0
+ pmaddwd m8, m0
+ packssdw m5, m8
+
+ movhlps m8, m10
+ punpcklbw m10, m9
+ punpcklbw m8, m9
+ pmaddwd m10, m0
+ pmaddwd m8, m0
+ packssdw m10, m8
+
+ paddw m4, m5
+ paddw m3, m10
+
+ paddw m4, m6
+ psraw m4, 6
+ paddw m3, m6
+ psraw m3, 6
+
+ packuswb m4, m3
+ movu [r2 + r3], m4
+
+ movq m2, [r0 + 16]
+ movq m3, [r0 + r1 + 16]
+ movq m4, [r5 + 16]
+ movq m5, [r5 + r1 + 16]
+
+ punpcklbw m2, m3
+ punpcklbw m4, m5
+
+ movhlps m8, m4
+ punpcklbw m4, m9
+ punpcklbw m8, m9
+ pmaddwd m4, m0
+ pmaddwd m8, m0
+ packssdw m4, m8
+
+ movhlps m8, m2
+ punpcklbw m2, m9
+ punpcklbw m8, m9
+ pmaddwd m2, m1
+ pmaddwd m8, m1
+ packssdw m2, m8
+
+ paddw m2, m4
+
+ paddw m2, m6
+ psraw m2, 6
+
+ movq m3, [r0 + r1 + 16]
+ movq m4, [r5 + 16]
+ movq m5, [r5 + r1 + 16]
+ movq m7, [r5 + 2 * r1 + 16]
+
+ punpcklbw m3, m4
+ punpcklbw m5, m7
+
+ movhlps m8, m5
+ punpcklbw m5, m9
+ punpcklbw m8, m9
+ pmaddwd m5, m0
+ pmaddwd m8, m0
+ packssdw m5, m8
+
+ movhlps m8, m3
+ punpcklbw m3, m9
+ punpcklbw m8, m9
+ pmaddwd m3, m1
+ pmaddwd m8, m1
+ packssdw m3, m8
+
+ paddw m3, m5
+
+ paddw m3, m6
+ psraw m3, 6
+
+ packuswb m2, m3
+ movh [r2 + 16], m2
+ movhps [r2 + r3 + 16], m2
+
+%if x < %1/2
+ mov r0, r5
+ lea r2, [r2 + 2 * r3]
+%endif
+%assign x x+1
+%endrep
+ RET
+
+%endmacro
+
+%if ARCH_X86_64
+ FILTER_V4_W24_sse2 32
+ FILTER_V4_W24_sse2 64
+%endif
+
%macro FILTER_H4_w2_2 3
movh %2, [srcq - 1]
pshufb %2, %2, Tm0
diff -r 7a81847ae6a2 -r 7c523bee1415 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Mon May 11 18:27:53 2015 -0700
+++ b/source/common/x86/ipfilter8.h Mon May 11 18:39:29 2015 -0700
@@ -933,6 +933,8 @@
void x265_interp_4tap_vert_pp_16x24_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_16x32_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_16x64_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_24x32_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_pp_24x64_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
#endif
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
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