[x265] [PATCH 10 of 12] asm: interp_4tap_vert_ps_32xN sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Mon May 18 04:49:01 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431915761 25200
# Node ID 7b6544657015334e0fa571fc369ac08c401e9619
# Parent 6b04fb941142b809bbf7326a115a859ce3a08d84
asm: interp_4tap_vert_ps_32xN sse2
Converted vert_pp_32xN macro to also create ps primitives. This replaces c code for ps with minimal impact on pp.
64-bit
./test/TestBench --testbench interp | grep vp | grep "32x"
chroma_vpp[32x32] 8.02x 33660.57 269893.41
chroma_vps[32x32] 7.34x 30918.89 227002.17
chroma_vpp[32x16] 8.09x 16937.68 136942.98
chroma_vps[32x16] 7.35x 15547.56 114342.84
chroma_vpp[32x24] 8.12x 25324.71 205517.50
chroma_vps[32x24] 7.36x 23167.54 170409.39
chroma_vpp[ 32x8] 8.05x 8412.51 67683.04
chroma_vps[ 32x8] 7.53x 7555.30 56923.70
chroma_vpp[32x64] 8.06x 66996.57 539788.81
chroma_vps[32x64] 7.39x 61492.46 454333.72
chroma_vpp[32x32] 8.06x 33655.25 271176.75
chroma_vps[32x32] 7.36x 30832.21 226821.72
chroma_vpp[32x48] 8.02x 50441.13 404571.69
chroma_vps[32x48] 7.37x 46230.04 340583.22
chroma_vpp[32x16] 8.09x 16937.61 137064.12
chroma_vps[32x16] 7.32x 15547.49 113817.55
chroma_vpp[32x32] 8.04x 33663.30 270794.66
chroma_vps[32x32] 7.37x 30873.11 227544.72
chroma_vpp[32x16] 8.07x 16937.51 136649.12
chroma_vps[32x16] 7.33x 15547.57 113930.27
chroma_vpp[32x64] 8.08x 67008.20 541583.00
chroma_vps[32x64] 7.40x 61431.15 454445.69
chroma_vpp[32x24] 8.03x 25322.75 203277.30
chroma_vps[32x24] 7.36x 23167.54 170494.78
chroma_vpp[ 32x8] 8.19x 8412.74 68903.22
chroma_vps[ 32x8] 7.59x 7515.08 57067.58
diff -r 6b04fb941142 -r 7b6544657015 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Sun May 17 19:13:36 2015 -0700
+++ b/source/common/x86/asm-primitives.cpp Sun May 17 19:22:41 2015 -0700
@@ -1534,6 +1534,10 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_vps = x265_interp_4tap_vert_ps_16x16_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_24x32].filter_vps = x265_interp_4tap_vert_ps_24x32_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x8].filter_vps = x265_interp_4tap_vert_ps_32x8_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x16].filter_vps = x265_interp_4tap_vert_ps_32x16_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x24].filter_vps = x265_interp_4tap_vert_ps_32x24_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_vps = x265_interp_4tap_vert_ps_32x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_6x16].filter_vps = x265_interp_4tap_vert_ps_6x16_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_8x12].filter_vps = x265_interp_4tap_vert_ps_8x12_sse2;
@@ -1547,6 +1551,10 @@
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
p.chroma[X265_CSP_I422].pu[CHROMA_422_24x64].filter_vps = x265_interp_4tap_vert_ps_24x64_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_32x16].filter_vps = x265_interp_4tap_vert_ps_32x16_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_32x32].filter_vps = x265_interp_4tap_vert_ps_32x32_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_32x48].filter_vps = x265_interp_4tap_vert_ps_32x48_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_32x64].filter_vps = x265_interp_4tap_vert_ps_32x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x4].filter_vps = x265_interp_4tap_vert_ps_8x4_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x8].filter_vps = x265_interp_4tap_vert_ps_8x8_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_8x16].filter_vps = x265_interp_4tap_vert_ps_8x16_sse2;
@@ -1559,6 +1567,11 @@
p.chroma[X265_CSP_I444].pu[LUMA_16x32].filter_vps = x265_interp_4tap_vert_ps_16x32_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_16x64].filter_vps = x265_interp_4tap_vert_ps_16x64_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_24x32].filter_vps = x265_interp_4tap_vert_ps_24x32_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_32x8].filter_vps = x265_interp_4tap_vert_ps_32x8_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_32x16].filter_vps = x265_interp_4tap_vert_ps_32x16_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_32x24].filter_vps = x265_interp_4tap_vert_ps_32x24_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_32x32].filter_vps = x265_interp_4tap_vert_ps_32x32_sse2;
+ p.chroma[X265_CSP_I444].pu[LUMA_32x64].filter_vps = x265_interp_4tap_vert_ps_32x64_sse2;
#endif
ALL_LUMA_PU(luma_hpp, interp_8tap_horiz_pp, sse2);
diff -r 6b04fb941142 -r 7b6544657015 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Sun May 17 19:13:36 2015 -0700
+++ b/source/common/x86/ipfilter8.asm Sun May 17 19:22:41 2015 -0700
@@ -2457,16 +2457,22 @@
%endif
;-----------------------------------------------------------------------------
-; void interp_4tap_vert_pp_32xN(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
-;-----------------------------------------------------------------------------
-%macro FILTER_V4_W32_sse2 1
+; void interp_4tap_vert_%1_32x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W32_sse2 2
INIT_XMM sse2
-cglobal interp_4tap_vert_pp_32x%1, 4, 6, 10
+cglobal interp_4tap_vert_%1_32x%2, 4, 6, 10
mov r4d, r4m
sub r0, r1
shl r4d, 5
pxor m9, m9
+
+%ifidn %1,pp
mova m6, [pw_32]
+%elifidn %1,ps
+ mova m6, [pw_2000]
+ add r3d, r3d
+%endif
%ifdef PIC
lea r5, [tab_ChromaCoeffV]
@@ -2477,7 +2483,7 @@
mova m0, [tab_ChromaCoeffV + r4 + 16]
%endif
- mov r4d, %1
+ mov r4d, %2
.loop:
movu m2, [r0]
@@ -2524,6 +2530,7 @@
paddw m4, m7
paddw m2, m3
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m2, m6
@@ -2531,6 +2538,12 @@
packuswb m4, m2
movu [r2], m4
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m2, m6
+ movu [r2], m4
+ movu [r2 + 16], m2
+%endif
movu m2, [r0 + 16]
movu m3, [r0 + r1 + 16]
@@ -2575,6 +2588,7 @@
paddw m4, m7
paddw m2, m3
+%ifidn %1,pp
paddw m4, m6
psraw m4, 6
paddw m2, m6
@@ -2582,6 +2596,12 @@
packuswb m4, m2
movu [r2 + 16], m4
+%elifidn %1,ps
+ psubw m4, m6
+ psubw m2, m6
+ movu [r2 + 32], m4
+ movu [r2 + 48], m2
+%endif
lea r0, [r0 + r1]
lea r2, [r2 + r3]
@@ -2592,13 +2612,21 @@
%endmacro
%if ARCH_X86_64
- FILTER_V4_W32_sse2 8
- FILTER_V4_W32_sse2 16
- FILTER_V4_W32_sse2 24
- FILTER_V4_W32_sse2 32
-
- FILTER_V4_W32_sse2 48
- FILTER_V4_W32_sse2 64
+ FILTER_V4_W32_sse2 pp, 8
+ FILTER_V4_W32_sse2 pp, 16
+ FILTER_V4_W32_sse2 pp, 24
+ FILTER_V4_W32_sse2 pp, 32
+
+ FILTER_V4_W32_sse2 pp, 48
+ FILTER_V4_W32_sse2 pp, 64
+
+ FILTER_V4_W32_sse2 ps, 8
+ FILTER_V4_W32_sse2 ps, 16
+ FILTER_V4_W32_sse2 ps, 24
+ FILTER_V4_W32_sse2 ps, 32
+
+ FILTER_V4_W32_sse2 ps, 48
+ FILTER_V4_W32_sse2 ps, 64
%endif
;-----------------------------------------------------------------------------
diff -r 6b04fb941142 -r 7b6544657015 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Sun May 17 19:13:36 2015 -0700
+++ b/source/common/x86/ipfilter8.h Sun May 17 19:22:41 2015 -0700
@@ -975,6 +975,12 @@
void x265_interp_4tap_vert_ps_16x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_24x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_ps_24x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x8_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x24_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x32_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x48_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_32x64_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
#endif
#undef LUMA_FILTERS
#undef LUMA_SP_FILTERS
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