[x265] [PATCH] asm: avx2code fore sad_x3[32xN] for 10bpp

[sumalatha at multicorewareinc.com]

# HG changeset patch
# User Sumalatha Polureddy
# Date 1431931417 -19800
#      Mon May 18 12:13:37 2015 +0530
# Node ID 3a1112791e4ed15239908e18f2f004ba8ddc2186
# Parent  e9283ef43b7c4eb32a435a835c4ffac2f1163d70
asm: avx2code fore sad_x3[32xN] for 10bpp

sse2
sad_x3[ 32x8]  2.87x    2260.13         6491.12
sad_x3[32x16]  2.95x    4262.20         12583.53
sad_x3[32x24]  2.66x    7356.49         19539.50
sad_x3[32x32]  2.81x    9852.31         27732.33
sad_x3[32x64]  2.80x    17682.81        49470.11

avx2
sad_x3[ 32x8]  5.83x    1100.14         6409.04
sad_x3[32x16]  6.33x    2072.92         13121.29
sad_x3[32x24]  5.16x    3801.07         19625.10
sad_x3[32x32]  5.43x    4781.53         25952.90
sad_x3[32x64]  5.74x    8709.35         49988.55

diff -r e9283ef43b7c -r 3a1112791e4e source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon May 18 12:03:30 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon May 18 12:13:37 2015 +0530
@@ -1335,6 +1335,11 @@
         p.pu[LUMA_16x16].sad_x3 = x265_pixel_sad_x3_16x16_avx2;
         p.pu[LUMA_16x32].sad_x3 = x265_pixel_sad_x3_16x32_avx2;
         p.pu[LUMA_16x64].sad_x3 = x265_pixel_sad_x3_16x64_avx2;
+        p.pu[LUMA_32x8].sad_x3 = x265_pixel_sad_x3_32x8_avx2;
+        p.pu[LUMA_32x16].sad_x3 = x265_pixel_sad_x3_32x16_avx2;
+        p.pu[LUMA_32x24].sad_x3 = x265_pixel_sad_x3_32x24_avx2;
+        p.pu[LUMA_32x32].sad_x3 = x265_pixel_sad_x3_32x32_avx2;
+        p.pu[LUMA_32x64].sad_x3 = x265_pixel_sad_x3_32x64_avx2;
 
         p.pu[LUMA_16x4].convert_p2s = x265_filterPixelToShort_16x4_avx2;
         p.pu[LUMA_16x8].convert_p2s = x265_filterPixelToShort_16x8_avx2;
diff -r e9283ef43b7c -r 3a1112791e4e source/common/x86/sad16-a.asm
--- a/source/common/x86/sad16-a.asm	Mon May 18 12:03:30 2015 +0530
+++ b/source/common/x86/sad16-a.asm	Mon May 18 12:13:37 2015 +0530
@@ -1491,6 +1491,11 @@
 SAD_X 3, 16,  16
 SAD_X 3, 16,  32
 SAD_X 3, 16,  64
+SAD_X 3, 32,  8
+SAD_X 3, 32, 16
+SAD_X 3, 32, 24
+SAD_X 3, 32, 32
+SAD_X 3, 32, 64
 %define XMM_REGS 9
 SAD_X 4, 16, 16
 SAD_X 4, 16,  8