[x265] [PATCH 01 of 12] asm: interp_4tap_vert_ps_2xN sse2
dtyx265 at gmail.com
dtyx265 at gmail.com
Tue May 19 02:24:28 CEST 2015
# HG changeset patch
# User David T Yuen <dtyx265 at gmail.com>
# Date 1431990059 25200
# Node ID 16ec2193116749c053ebf4fd08a15aa403305a0b
# Parent 8592bf81d0848279fa79cd1487406cb516dffe99
asm: interp_4tap_vert_ps_2xN sse2
Updated vert_pp_2xN macro to also create ps. This replaces c code for ps with minimal impact on pp.
64-bit
./test/TestBench --testbench interp | grep vp | grep " 2x"
chroma_vpp[ 2x4] 1.83x 632.45 1159.97
chroma_vps[ 2x4] 1.46x 612.48 894.96
chroma_vpp[ 2x8] 1.72x 1204.98 2067.49
chroma_vps[ 2x8] 1.49x 1152.50 1712.50
chroma_vpp[ 2x16] 1.94x 2314.93 4480.29
chroma_vps[ 2x16] 1.91x 2222.52 4252.67
32-bit
./test/TestBench --testbench interp | grep vp | grep " 2x"
chroma_vpp[ 2x4] 1.73x 847.49 1469.90
chroma_vps[ 2x4] 1.60x 772.45 1234.96
chroma_vpp[ 2x8] 1.88x 1479.99 2787.49
chroma_vps[ 2x8] 1.93x 1392.54 2682.44
chroma_vpp[ 2x16] 2.23x 2764.99 6177.61
chroma_vps[ 2x16] 1.85x 2632.48 4867.65
diff -r 8592bf81d084 -r 16ec21931167 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu May 14 17:12:14 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Mon May 18 16:00:59 2015 -0700
@@ -1448,6 +1448,9 @@
p.chroma[X265_CSP_I444].pu[LUMA_4x4].filter_vpp = x265_interp_4tap_vert_pp_4x4_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_4x8].filter_vpp = x265_interp_4tap_vert_pp_4x8_sse2;
p.chroma[X265_CSP_I444].pu[LUMA_4x16].filter_vpp = x265_interp_4tap_vert_pp_4x16_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_2x4].filter_vps = x265_interp_4tap_vert_ps_2x4_sse2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_2x8].filter_vps = x265_interp_4tap_vert_ps_2x8_sse2;
+ p.chroma[X265_CSP_I422].pu[CHROMA_422_2x16].filter_vps = x265_interp_4tap_vert_ps_2x16_sse2;
#if X86_64
p.chroma[X265_CSP_I420].pu[CHROMA_420_6x8].filter_vpp = x265_interp_4tap_vert_pp_6x8_sse2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_8x2].filter_vpp = x265_interp_4tap_vert_pp_8x2_sse2;
diff -r 8592bf81d084 -r 16ec21931167 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm Thu May 14 17:12:14 2015 +0530
+++ b/source/common/x86/ipfilter8.asm Mon May 18 16:00:59 2015 -0700
@@ -878,19 +878,25 @@
%endmacro
;-----------------------------------------------------------------------------
-; void interp_4tap_vert_pp_2xn(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
-;-----------------------------------------------------------------------------
-%macro FILTER_V4_W2_H4_sse2 1
+; void interp_4tap_vert_%1_2x%2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------
+%macro FILTER_V4_W2_H4_sse2 2
INIT_XMM sse2
%if ARCH_X86_64
-cglobal interp_4tap_vert_pp_2x%1, 4, 6, 9
+cglobal interp_4tap_vert_%1_2x%2, 4, 6, 9
pxor m8, m8
%else
-cglobal interp_4tap_vert_pp_2x%1, 4, 6, 8
+cglobal interp_4tap_vert_%1_2x%2, 4, 6, 8
%endif
mov r4d, r4m
sub r0, r1
+%ifidn %1,pp
+ mova m1, [pw_32]
+%elifidn %1,ps
+ mova m1, [pw_2000]
+%endif
+
%ifdef PIC
lea r5, [tabw_ChromaCoeff]
movh m0, [r5 + r4 * 8]
@@ -899,11 +905,10 @@
%endif
punpcklqdq m0, m0
- mova m1, [pw_32]
lea r5, [3 * r1]
%assign x 1
-%rep %1/4
+%rep %2/4
movd m2, [r0]
movd m3, [r0 + r1]
movd m4, [r0 + 2 * r1]
@@ -930,7 +935,6 @@
pshuflw m3, m2, q2301
pshufhw m3, m3, q2301
paddw m2, m3
- psrld m2, 16
movd m7, [r0 + r1]
@@ -954,8 +958,10 @@
pshuflw m5, m4, q2301
pshufhw m5, m5, q2301
paddw m4, m5
+
+%ifidn %1,pp
+ psrld m2, 16
psrld m4, 16
-
packssdw m2, m4
paddw m2, m1
psraw m2, 6
@@ -983,19 +989,41 @@
shr r4, 16
mov [r2 + r3], r4w
%endif
-
-%if x < %1/4
+%if x < %2/4
lea r2, [r2 + 2 * r3]
%endif
+%elifidn %1,ps
+ psrldq m2, 2
+ psrldq m4, 2
+ pshufd m2, m2, q3120
+ pshufd m4, m4, q3120
+ psubw m4, m1
+ psubw m2, m1
+
+ movd [r2], m2
+ psrldq m2, 4
+ movd [r2 + 2 * r3], m2
+ lea r2, [r2 + 4 * r3]
+ movd [r2], m4
+ psrldq m4, 4
+ movd [r2 + 2 * r3], m4
+%if x < %2/4
+ lea r2, [r2 + 4 * r3]
+%endif
+%endif
%assign x x+1
%endrep
RET
%endmacro
- FILTER_V4_W2_H4_sse2 4
- FILTER_V4_W2_H4_sse2 8
- FILTER_V4_W2_H4_sse2 16
+ FILTER_V4_W2_H4_sse2 pp, 4
+ FILTER_V4_W2_H4_sse2 pp, 8
+ FILTER_V4_W2_H4_sse2 pp, 16
+
+ FILTER_V4_W2_H4_sse2 ps, 4
+ FILTER_V4_W2_H4_sse2 ps, 8
+ FILTER_V4_W2_H4_sse2 ps, 16
;-----------------------------------------------------------------------------
; void interp_4tap_vert_pp_4x2(pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx)
diff -r 8592bf81d084 -r 16ec21931167 source/common/x86/ipfilter8.h
--- a/source/common/x86/ipfilter8.h Thu May 14 17:12:14 2015 +0530
+++ b/source/common/x86/ipfilter8.h Mon May 18 16:00:59 2015 -0700
@@ -913,6 +913,9 @@
void x265_interp_4tap_vert_pp_4x8_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_4x16_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_4x32_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_2x4_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_2x8_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
+void x265_interp_4tap_vert_ps_2x16_sse2(const pixel* src, intptr_t srcStride, int16_t* dst, intptr_t dstStride, int coeffIdx);
#ifdef X86_64
void x265_interp_4tap_vert_pp_6x8_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
void x265_interp_4tap_vert_pp_6x16_sse2(const pixel *src, intptr_t srcStride, pixel *dst, intptr_t dstStride, int coeffIdx);
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