[x265] [PATCH] asm: avx2 10bit code for chroma_hpp[32xN] for i420
rajesh at multicorewareinc.com
rajesh at multicorewareinc.com
Wed May 27 09:32:12 CEST 2015
# HG changeset patch
# User Rajesh Paulraj<rajesh at multicorewareinc.com>
# Date 1432711490 -19800
# Wed May 27 12:54:50 2015 +0530
# Node ID 3c2a050acbd7ee16f44f19ce170a701774c0e460
# Parent 0de4de0f5e1a020de61bde7b981d8ab1fcbb6b74
asm: avx2 10bit code for chroma_hpp[32xN] for i420
avx2:
chroma_hpp[ 32x8] 6.38x 2789.28 17793.53
chroma_hpp[32x16] 6.55x 5534.30 36258.52
chroma_hpp[32x24] 6.50x 8265.85 53710.54
chroma_hpp[32x32] 6.88x 11277.01 77575.87
sse4:
chroma_hpp[ 32x8] 5.54x 3379.60 18730.04
chroma_hpp[32x16] 5.64x 16906.61 95327.80
chroma_hpp[32x24] 5.82x 15781.41 91801.38
chroma_hpp[32x32] 5.37x 12911.95 69306.38
diff -r 0de4de0f5e1a -r 3c2a050acbd7 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Wed May 27 12:52:06 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Wed May 27 12:54:50 2015 +0530
@@ -1538,6 +1538,10 @@
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x12].filter_hpp = x265_interp_4tap_horiz_pp_16x12_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x16].filter_hpp = x265_interp_4tap_horiz_pp_16x16_avx2;
p.chroma[X265_CSP_I420].pu[CHROMA_420_16x32].filter_hpp = x265_interp_4tap_horiz_pp_16x32_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x8].filter_hpp = x265_interp_4tap_horiz_pp_32x8_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x16].filter_hpp = x265_interp_4tap_horiz_pp_32x16_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x24].filter_hpp = x265_interp_4tap_horiz_pp_32x24_avx2;
+ p.chroma[X265_CSP_I420].pu[CHROMA_420_32x32].filter_hpp = x265_interp_4tap_horiz_pp_32x32_avx2;
if (cpuMask & X265_CPU_BMI2)
p.scanPosLast = x265_scanPosLast_avx2_bmi2;
diff -r 0de4de0f5e1a -r 3c2a050acbd7 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Wed May 27 12:52:06 2015 +0530
+++ b/source/common/x86/ipfilter16.asm Wed May 27 12:54:50 2015 +0530
@@ -2592,6 +2592,80 @@
IPFILTER_CHROMA_avx2_16xN 16
IPFILTER_CHROMA_avx2_16xN 32
+;-------------------------------------------------------------------------------------------------------------
+; void interp_4tap_horiz_pp(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx
+;-------------------------------------------------------------------------------------------------------------
+INIT_YMM avx2
+%macro IPFILTER_CHROMA_avx2_32xN 1
+%if ARCH_X86_64
+cglobal interp_4tap_horiz_pp_32x%1, 5,6,9
+ add r1d, r1d
+ add r3d, r3d
+ sub r0, 2
+ mov r4d, r4m
+%ifdef PIC
+ lea r5, [tab_ChromaCoeff]
+ vpbroadcastq m0, [r5 + r4 * 8]
+%else
+ vpbroadcastq m0, [tab_ChromaCoeff + r4 * 8]
+%endif
+ mova m1, [interp8_hpp_shuf]
+ vpbroadcastd m2, [pd_32]
+ pxor m5, m5
+ mova m6, [idct8_shuf2]
+ mova m7, [pw_pixel_max]
+
+ mov r6d, %1
+.loop:
+%assign x 0
+%rep 2
+ vbroadcasti128 m3, [r0 + x]
+ vbroadcasti128 m4, [r0 + 8 + x]
+ pshufb m3, m1
+ pshufb m4, m1
+
+ pmaddwd m3, m0
+ pmaddwd m4, m0
+ phaddd m3, m4
+ paddd m3, m2
+ psrad m3, 6 ; m3 = DWORD[7 6 3 2 5 4 1 0]
+
+ packusdw m3, m3
+ vpermq m3, m3, q2020
+ pshufb xm3, xm6 ; m3 = WORD[7 6 5 4 3 2 1 0]
+
+ vbroadcasti128 m4, [r0 + 16 + x]
+ vbroadcasti128 m8, [r0 + 24 + x]
+ pshufb m4, m1
+ pshufb m8, m1
+
+ pmaddwd m4, m0
+ pmaddwd m8, m0
+ phaddd m4, m8
+ paddd m4, m2
+ psrad m4, 6 ; m3 = DWORD[7 6 3 2 5 4 1 0]
+
+ packusdw m4, m4
+ vpermq m4, m4, q2020
+ pshufb xm4, xm6 ; m3 = WORD[7 6 5 4 3 2 1 0]
+ vinserti128 m3, m3, xm4, 1
+ CLIPW m3, m5, m7
+ movu [r2 + x], m3
+ %assign x x+32
+ %endrep
+
+ add r0, r1
+ add r2, r3
+ dec r6d
+ jnz .loop
+ RET
+%endif
+%endmacro
+IPFILTER_CHROMA_avx2_32xN 8
+IPFILTER_CHROMA_avx2_32xN 16
+IPFILTER_CHROMA_avx2_32xN 24
+IPFILTER_CHROMA_avx2_32xN 32
+
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert_%3_%1x%2(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
More information about the x265-devel
mailing list