[x265] [PATCH] asm: avx2 10bit code for chroma_hpp[48x64] for i444(37333.09 -> 22624.32)
rajesh at multicorewareinc.com
rajesh at multicorewareinc.com
Thu May 28 12:24:52 CEST 2015
# HG changeset patch
# User Rajesh Paulraj<rajesh at multicorewareinc.com>
# Date 1432807224 -19800
# Thu May 28 15:30:24 2015 +0530
# Node ID 09b0056ca229c87288ef0169ed2d169b706b237b
# Parent a0df6b36abaaa849d733febb589416cead40d5b8
asm: avx2 10bit code for chroma_hpp[48x64] for i444(37333.09 -> 22624.32)
diff -r a0df6b36abaa -r 09b0056ca229 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Thu May 28 15:24:08 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Thu May 28 15:30:24 2015 +0530
@@ -1549,6 +1549,7 @@
p.chroma[X265_CSP_I444].pu[LUMA_64x32].filter_hpp = x265_interp_4tap_horiz_pp_64x32_avx2;
p.chroma[X265_CSP_I444].pu[LUMA_64x48].filter_hpp = x265_interp_4tap_horiz_pp_64x48_avx2;
p.chroma[X265_CSP_I444].pu[LUMA_64x64].filter_hpp = x265_interp_4tap_horiz_pp_64x64_avx2;
+ p.chroma[X265_CSP_I444].pu[LUMA_48x64].filter_hpp = x265_interp_4tap_horiz_pp_48x64_avx2;
if (cpuMask & X265_CPU_BMI2)
p.scanPosLast = x265_scanPosLast_avx2_bmi2;
diff -r a0df6b36abaa -r 09b0056ca229 source/common/x86/ipfilter16.asm
--- a/source/common/x86/ipfilter16.asm Thu May 28 15:24:08 2015 +0530
+++ b/source/common/x86/ipfilter16.asm Thu May 28 15:30:24 2015 +0530
@@ -2953,6 +2953,69 @@
IPFILTER_CHROMA_avx2_64xN 48
IPFILTER_CHROMA_avx2_64xN 64
+;-------------------------------------------------------------------------------------------------------------
+; void interp_4tap_horiz_pp(pixel *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx
+;-------------------------------------------------------------------------------------------------------------
+INIT_YMM avx2
+%if ARCH_X86_64
+cglobal interp_4tap_horiz_pp_48x64, 5,6,9
+ add r1d, r1d
+ add r3d, r3d
+ sub r0, 2
+ mov r4d, r4m
+%ifdef PIC
+ lea r5, [tab_ChromaCoeff]
+ vpbroadcastq m0, [r5 + r4 * 8]
+%else
+ vpbroadcastq m0, [tab_ChromaCoeff + r4 * 8]
+%endif
+ mova m1, [interp8_hpp_shuf]
+ vpbroadcastd m2, [pd_32]
+ pxor m5, m5
+ mova m6, [idct8_shuf2]
+ mova m7, [pw_pixel_max]
+
+ mov r4d, 64
+.loop:
+%assign x 0
+%rep 3
+ vbroadcasti128 m3, [r0 + x]
+ vbroadcasti128 m4, [r0 + 8 + x]
+ pshufb m3, m1
+ pshufb m4, m1
+
+ pmaddwd m3, m0
+ pmaddwd m4, m0
+ phaddd m3, m4
+ paddd m3, m2
+ psrad m3, 6
+
+ vbroadcasti128 m4, [r0 + 16 + x]
+ vbroadcasti128 m8, [r0 + 24 + x]
+ pshufb m4, m1
+ pshufb m8, m1
+
+ pmaddwd m4, m0
+ pmaddwd m8, m0
+ phaddd m4, m8
+ paddd m4, m2
+ psrad m4, 6
+
+ packusdw m3, m4
+ vpermq m3, m3, q3120
+ pshufb m3, m6
+ CLIPW m3, m5, m7
+ movu [r2 + x], m3
+%assign x x+32
+%endrep
+
+ add r0, r1
+ add r2, r3
+ dec r4d
+ jnz .loop
+ RET
+%endif
+
;-----------------------------------------------------------------------------------------------------------------
; void interp_4tap_vert_%3_%1x%2(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
;-----------------------------------------------------------------------------------------------------------------
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