[x265] [PATCH stable] ssd: fix overflow in ssd_s for 12 bit

[Divya Manivannan]

# HG changeset patch
# User Divya Manivannan <divya at multicorewareinc.com>
# Date 1444645283 -19800
#      Mon Oct 12 15:51:23 2015 +0530
# Node ID a976a3e2a9e536a2e42474c95e9659ae123b71a2
# Parent  534d80f9272b43485cca8bb0c0a522ec8abeaa13
ssd: fix overflow in ssd_s for 12 bit

diff -r 534d80f9272b -r a976a3e2a9e5 source/common/pixel.cpp
--- a/source/common/pixel.cpp	Wed Sep 30 15:31:39 2015 +0530
+++ b/source/common/pixel.cpp	Mon Oct 12 15:51:23 2015 +0530
@@ -404,9 +404,9 @@
 }
 
 template<int size>
-int pixel_ssd_s_c(const int16_t* a, intptr_t dstride)
+sse_ret_t pixel_ssd_s_c(const int16_t* a, intptr_t dstride)
 {
-    int sum = 0;
+    sse_ret_t sum = 0;
     for (int y = 0; y < size; y++)
     {
         for (int x = 0; x < size; x++)
diff -r 534d80f9272b -r a976a3e2a9e5 source/common/primitives.h
--- a/source/common/primitives.h	Wed Sep 30 15:31:39 2015 +0530
+++ b/source/common/primitives.h	Mon Oct 12 15:51:23 2015 +0530
@@ -114,7 +114,7 @@
 typedef int  (*pixelcmp_ss_t)(const int16_t* fenc, intptr_t fencstride, const int16_t* fref, intptr_t frefstride);
 typedef sse_ret_t (*pixel_sse_t)(const pixel* fenc, intptr_t fencstride, const pixel* fref, intptr_t frefstride); // fenc is aligned
 typedef sse_ret_t (*pixel_sse_ss_t)(const int16_t* fenc, intptr_t fencstride, const int16_t* fref, intptr_t frefstride);
-typedef int  (*pixel_ssd_s_t)(const int16_t* fenc, intptr_t fencstride);
+typedef sse_ret_t (*pixel_ssd_s_t)(const int16_t* fenc, intptr_t fencstride);
 typedef void (*pixelcmp_x4_t)(const pixel* fenc, const pixel* fref0, const pixel* fref1, const pixel* fref2, const pixel* fref3, intptr_t frefstride, int32_t* res);
 typedef void (*pixelcmp_x3_t)(const pixel* fenc, const pixel* fref0, const pixel* fref1, const pixel* fref2, intptr_t frefstride, int32_t* res);
 typedef void (*blockfill_s_t)(int16_t* dst, intptr_t dstride, int16_t val);
diff -r 534d80f9272b -r a976a3e2a9e5 source/common/x86/pixel.h
--- a/source/common/x86/pixel.h	Wed Sep 30 15:31:39 2015 +0530
+++ b/source/common/x86/pixel.h	Mon Oct 12 15:51:23 2015 +0530
@@ -50,8 +50,8 @@
     FUNCDEF_CHROMA_PU(int, pixel_sad, cpu, const pixel*, intptr_t, const pixel*, intptr_t); \
     FUNCDEF_CHROMA_PU(uint32_t, pixel_ssd_ss, cpu, const int16_t*, intptr_t, const int16_t*, intptr_t); \
     FUNCDEF_CHROMA_PU(void, addAvg, cpu, const int16_t*, const int16_t*, pixel*, intptr_t, intptr_t, intptr_t); \
-    FUNCDEF_CHROMA_PU(int, pixel_ssd_s, cpu, const int16_t*, intptr_t); \
-    FUNCDEF_TU_S(int, pixel_ssd_s, cpu, const int16_t*, intptr_t); \
+    FUNCDEF_CHROMA_PU(sse_ret_t, pixel_ssd_s, cpu, const int16_t*, intptr_t); \
+    FUNCDEF_TU_S(sse_ret_t, pixel_ssd_s, cpu, const int16_t*, intptr_t); \
     FUNCDEF_TU(uint64_t, pixel_var, cpu, const pixel*, intptr_t); \
     FUNCDEF_TU(int, psyCost_pp, cpu, const pixel* source, intptr_t sstride, const pixel* recon, intptr_t rstride); \
     FUNCDEF_TU(int, psyCost_ss, cpu, const int16_t* source, intptr_t sstride, const int16_t* recon, intptr_t rstride)
diff -r 534d80f9272b -r a976a3e2a9e5 source/test/pixelharness.cpp
--- a/source/test/pixelharness.cpp	Wed Sep 30 15:31:39 2015 +0530
+++ b/source/test/pixelharness.cpp	Mon Oct 12 15:51:23 2015 +0530
@@ -228,8 +228,8 @@
     {
         // NOTE: stride must be multiple of 16, because minimum block is 4x4
         int stride = (STRIDE + (rand() % STRIDE)) & ~15;
-        int cres = ref(sbuf1 + j, stride);
-        int vres = (int)checked(opt, sbuf1 + j, (intptr_t)stride);
+        sse_ret_t cres = ref(sbuf1 + j, stride);
+        sse_ret_t vres = (sse_ret_t)checked(opt, sbuf1 + j, (intptr_t)stride);
 
         if (cres != vres)
             return false;