[x265] [PATCH] asm: fix intrapred_planar16x16 sse4 code for main12

[chen]

code are right, just a little improve idea


At 2015-10-23 16:28:35,dnyaneshwar at multicorewareinc.com wrote:
># HG changeset patch
># User Dnyaneshwar G <dnyaneshwar at multicorewareinc.com>
># Date 1445588852 -19800
>#      Fri Oct 23 13:57:32 2015 +0530
># Node ID 0fb5a67c2f5ea4f3fe1a7e0dcbc0c5c117dd6dfc
># Parent  a7251c3e0ef810b95bb25be5371035208e36996d
>asm: fix intrapred_planar16x16 sse4 code for main12
>
>diff -r a7251c3e0ef8 -r 0fb5a67c2f5e source/common/x86/asm-primitives.cpp
>--- a/source/common/x86/asm-primitives.cpp	Thu Oct 22 09:12:28 2015 +0530
>+++ b/source/common/x86/asm-primitives.cpp	Fri Oct 23 13:57:32 2015 +0530
>@@ -1145,8 +1145,9 @@
>         p.cu[BLOCK_4x4].intra_pred[PLANAR_IDX] = PFX(intra_pred_planar4_sse4);
>         p.cu[BLOCK_8x8].intra_pred[PLANAR_IDX] = PFX(intra_pred_planar8_sse4);
> 
>+        p.cu[BLOCK_16x16].intra_pred[PLANAR_IDX] = PFX(intra_pred_planar16_sse4);
>+
> #if X265_DEPTH <= 10
>-        p.cu[BLOCK_16x16].intra_pred[PLANAR_IDX] = PFX(intra_pred_planar16_sse4);
>         p.cu[BLOCK_32x32].intra_pred[PLANAR_IDX] = PFX(intra_pred_planar32_sse4);
> #endif
>         ALL_LUMA_TU_S(intra_pred[DC_IDX], intra_pred_dc, sse4);
>diff -r a7251c3e0ef8 -r 0fb5a67c2f5e source/common/x86/const-a.asm
>--- a/source/common/x86/const-a.asm	Thu Oct 22 09:12:28 2015 +0530
>+++ b/source/common/x86/const-a.asm	Fri Oct 23 13:57:32 2015 +0530
>@@ -122,6 +122,7 @@
> const pd_2,                 times  8 dd 2
> const pd_4,                 times  4 dd 4
> const pd_8,                 times  4 dd 8
>+const pd_15,                times  8 dd 15
> const pd_16,                times  8 dd 16
> const pd_31,                times  4 dd 31
> const pd_32,                times  8 dd 32
>@@ -136,7 +137,8 @@
> const pd_524416,            times  4 dd 524416
> const pd_n32768,            times  8 dd 0xffff8000
> const pd_n131072,           times  4 dd 0xfffe0000
>-
>+const pd_planar16_mul0,     times  1 dd  15,  14,  13,  12,  11,  10,   9,   8,   7,   6,   5,   4,   3,   2,   1,   0
>+const pd_planar16_mul1,     times  1 dd   1,   2,   3,   4,   5,   6,   7,   8,   9,  10,  11,  12,  13,  14,  15,  16
> const trans8_shuf,          times  1 dd   0,   4,   1,   5,   2,   6,   3,   7
> 
> const popcnt_table
>diff -r a7251c3e0ef8 -r 0fb5a67c2f5e source/common/x86/intrapred16.asm
>--- a/source/common/x86/intrapred16.asm	Thu Oct 22 09:12:28 2015 +0530
>+++ b/source/common/x86/intrapred16.asm	Fri Oct 23 13:57:32 2015 +0530
>@@ -109,6 +109,7 @@
> cextern pw_16
> cextern pw_31
> cextern pw_32
>+cextern pd_15
> cextern pd_16
> cextern pd_31
> cextern pd_32
>@@ -123,6 +124,8 @@
> cextern pb_unpackwq1
> cextern pb_unpackwq2
> cextern pw_planar16_mul
>+cextern pd_planar16_mul0
>+cextern pd_planar16_mul1
> cextern pw_planar32_mul
> 
> ;-----------------------------------------------------------------------------------
>@@ -2216,6 +2219,114 @@
> ; void intra_pred_planar(pixel* dst, intptr_t dstStride, pixel*srcPix, int, int filter)
> ;---------------------------------------------------------------------------------------
> INIT_XMM sse4
>+%if ARCH_X86_64 == 1 && BIT_DEPTH == 12
>+cglobal intra_pred_planar16, 3,5,12
>+    add             r1d, r1d
>+
>+    pmovzxwd        m2, [r2 + 2]
>+    pmovzxwd        m7, [r2 + 10]
>+    pmovzxwd        m10, [r2 + 18]
>+    pmovzxwd        m0, [r2 + 26]
>+
>+    movzx           r3d, word [r2 + 34]                     ; topRight   = above[16]
>+    lea             r4, [pd_planar16_mul1]
>+
>+    movd            m3, r3d
>+    pshufd          m3, m3, 0                               ; topRight
>+
>+    pmulld          m8, m3, [r4 + 3*mmsize]                 ; (x + 1) * topRight
>+    pmulld          m4, m3, [r4 + 2*mmsize]                 ; (x + 1) * topRight
>+    pmulld          m9, m3, [r4 + 1*mmsize]                 ; (x + 1) * topRight
>+    pmulld          m3, m3, [r4 + 0*mmsize]                 ; (x + 1) * topRight
dword multiplication very slow, I suggest do it on [r4 + 0*mmsize] only, other can get from addition [m3*4]
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