[x265] [PATCH] asm: fix sad[48x64] avx2 code for main12
rajesh at multicorewareinc.com
rajesh at multicorewareinc.com
Tue Sep 29 10:37:20 CEST 2015
# HG changeset patch
# User Rajesh Paulraj<rajesh at multicorewareinc.com>
# Date 1443515696 -19800
# Tue Sep 29 14:04:56 2015 +0530
# Node ID 8411b3d5b07c65bfcf2813133bb8daa665526ac4
# Parent d7cde5dbec838f53e87faceac989d6cd987bfc72
asm: fix sad[48x64] avx2 code for main12
diff -r d7cde5dbec83 -r 8411b3d5b07c source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Tue Sep 29 14:00:27 2015 +0530
+++ b/source/common/x86/asm-primitives.cpp Tue Sep 29 14:04:56 2015 +0530
@@ -1630,8 +1630,8 @@
p.pu[LUMA_32x24].sad = PFX(pixel_sad_32x24_avx2);
p.pu[LUMA_32x32].sad = PFX(pixel_sad_32x32_avx2);
p.pu[LUMA_32x64].sad = PFX(pixel_sad_32x64_avx2);
+ p.pu[LUMA_48x64].sad = PFX(pixel_sad_48x64_avx2);
#if X265_DEPTH <= 10
- p.pu[LUMA_48x64].sad = PFX(pixel_sad_48x64_avx2);
p.pu[LUMA_64x16].sad = PFX(pixel_sad_64x16_avx2);
p.pu[LUMA_64x32].sad = PFX(pixel_sad_64x32_avx2);
p.pu[LUMA_64x48].sad = PFX(pixel_sad_64x48_avx2);
diff -r d7cde5dbec83 -r 8411b3d5b07c source/common/x86/sad16-a.asm
--- a/source/common/x86/sad16-a.asm Tue Sep 29 14:00:27 2015 +0530
+++ b/source/common/x86/sad16-a.asm Tue Sep 29 14:04:56 2015 +0530
@@ -769,9 +769,8 @@
INIT_YMM avx2
cglobal pixel_sad_48x64, 4, 5, 7
pxor m0, m0
- pxor m5, m5
- pxor m6, m6
mov r4d, 64/2
+ mova m6, [pw_1]
add r3d, r3d
add r1d, r1d
.loop:
@@ -784,9 +783,8 @@
pabsw m1, m1
pabsw m2, m2
pabsw m3, m3
- paddw m0, m1
- paddw m5, m2
- paddw m6, m3
+ paddw m1, m2
+ paddw m5, m3, m1
movu m1, [r2 + r3 + 0 * mmsize]
movu m2, [r2 + r3 + 1 * mmsize]
@@ -797,22 +795,20 @@
pabsw m1, m1
pabsw m2, m2
pabsw m3, m3
- paddw m0, m1
- paddw m5, m2
- paddw m6, m3
+ paddw m1, m2
+ paddw m3, m1
+ pmaddwd m5, m6
+ paddd m0, m5
+ pmaddwd m3, m6
+ paddd m0, m3
lea r0, [r0 + 2 * r1]
lea r2, [r2 + 2 * r3]
dec r4d
jg .loop
- HADDUWD m0, m1
- HADDUWD m5, m1
- HADDUWD m6, m1
- paddd m0, m5
- paddd m0, m6
- HADDD m0, m1
+ HADDD m0, m3
movd eax, xm0
RET
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