[x265] [PATCH 02 of 20] x86:Rearrange some cpuflag relations

[vignesh at multicorewareinc.com]

# HG changeset patch
# User Vignesh Vijayakumar
# Date 1496126530 -19800
#      Tue May 30 12:12:10 2017 +0530
# Node ID 84b8b05838b1a5619eb5631a18454f25245d0286
# Parent  cdf02fe4a209ca20ded4353c8049a6bbd425304b
x86:Rearrange some cpuflag relations

diff -r cdf02fe4a209 -r 84b8b05838b1 source/common/cpu.cpp
--- a/source/common/cpu.cpp	Tue May 30 11:37:41 2017 +0530
+++ b/source/common/cpu.cpp	Tue May 30 12:12:10 2017 +0530
@@ -69,6 +69,7 @@
     { "SSE2Slow",    SSE2 | X265_CPU_SSE2_IS_SLOW },
     { "SSE2",        SSE2 },
     { "SSE2Fast",    SSE2 | X265_CPU_SSE2_IS_FAST },
+    { "LZCNT", X265_CPU_LZCNT },
     { "SSE3",        SSE2 | X265_CPU_SSE3 },
     { "SSSE3",       SSE2 | X265_CPU_SSE3 | X265_CPU_SSSE3 },
     { "SSE4.1",      SSE2 | X265_CPU_SSE3 | X265_CPU_SSSE3 | X265_CPU_SSE4 },
@@ -78,16 +79,17 @@
     { "AVX",         AVX },
     { "XOP",         AVX | X265_CPU_XOP },
     { "FMA4",        AVX | X265_CPU_FMA4 },
-    { "AVX2",        AVX | X265_CPU_AVX2 },
     { "FMA3",        AVX | X265_CPU_FMA3 },
+    { "BMI1",        AVX | X265_CPU_LZCNT | X265_CPU_BMI1 },
+    { "BMI2",        AVX | X265_CPU_LZCNT | X265_CPU_BMI1 | X265_CPU_BMI2 },
+#define AVX2 AVX | X265_CPU_FMA3 | X265_CPU_LZCNT | X265_CPU_BMI1 | X265_CPU_BMI2 | X265_CPU_AVX2
+    { "AVX2", AVX2},
+#undef AVX2
 #undef AVX
 #undef SSE2
 #undef MMX2
     { "Cache32",         X265_CPU_CACHELINE_32 },
     { "Cache64",         X265_CPU_CACHELINE_64 },
-    { "LZCNT",           X265_CPU_LZCNT },
-    { "BMI1",            X265_CPU_BMI1 },
-    { "BMI2",            X265_CPU_BMI1 | X265_CPU_BMI2 },
     { "SlowCTZ",         X265_CPU_SLOW_CTZ },
     { "SlowAtom",        X265_CPU_SLOW_ATOM },
     { "SlowPshufb",      X265_CPU_SLOW_PSHUFB },
diff -r cdf02fe4a209 -r 84b8b05838b1 source/common/x86/x86inc.asm
--- a/source/common/x86/x86inc.asm	Tue May 30 11:37:41 2017 +0530
+++ b/source/common/x86/x86inc.asm	Tue May 30 12:12:10 2017 +0530
@@ -735,24 +735,24 @@
 %assign cpuflags_sse      (1<<4) | cpuflags_mmx2
 %assign cpuflags_sse2     (1<<5) | cpuflags_sse
 %assign cpuflags_sse2slow (1<<6) | cpuflags_sse2
-%assign cpuflags_sse3     (1<<7) | cpuflags_sse2
-%assign cpuflags_ssse3    (1<<8) | cpuflags_sse3
-%assign cpuflags_sse4     (1<<9) | cpuflags_ssse3
-%assign cpuflags_sse42    (1<<10)| cpuflags_sse4
-%assign cpuflags_avx      (1<<11)| cpuflags_sse42
-%assign cpuflags_xop      (1<<12)| cpuflags_avx
-%assign cpuflags_fma4     (1<<13)| cpuflags_avx
-%assign cpuflags_avx2     (1<<14)| cpuflags_avx
+%assign cpuflags_lzcnt    (1<<7) | cpuflags_sse2
+%assign cpuflags_sse3     (1<<8) | cpuflags_sse2
+%assign cpuflags_ssse3    (1<<9) | cpuflags_sse3
+%assign cpuflags_sse4     (1<<10)| cpuflags_ssse3
+%assign cpuflags_sse42    (1<<11)| cpuflags_sse4
+%assign cpuflags_avx      (1<<12)| cpuflags_sse42
+%assign cpuflags_xop      (1<<13)| cpuflags_avx
+%assign cpuflags_fma4     (1<<14)| cpuflags_avx
 %assign cpuflags_fma3     (1<<15)| cpuflags_avx
+%assign cpuflags_bmi1     (1<<16)| cpuflags_avx | cpuflags_lzcnt
+%assign cpuflags_bmi2     (1<<17)| cpuflags_bmi1
+%assign cpuflags_avx2     (1<<18)| cpuflags_fma3 | cpuflags_bmi2
 
-%assign cpuflags_cache32  (1<<16)
-%assign cpuflags_cache64  (1<<17)
-%assign cpuflags_slowctz  (1<<18)
-%assign cpuflags_lzcnt    (1<<19)
-%assign cpuflags_aligned  (1<<20) ; not a cpu feature, but a function variant
-%assign cpuflags_atom     (1<<21)
-%assign cpuflags_bmi1     (1<<22)|cpuflags_lzcnt
-%assign cpuflags_bmi2     (1<<23)|cpuflags_bmi1
+%assign cpuflags_cache32  (1<<19)
+%assign cpuflags_cache64  (1<<20)
+%assign cpuflags_slowctz  (1<<21)
+%assign cpuflags_aligned  (1<<22) ; not a cpu feature, but a function variant
+%assign cpuflags_atom     (1<<23)
 
 %define    cpuflag(x) ((cpuflags & (cpuflags_ %+ x)) == (cpuflags_ %+ x))
 %define notcpuflag(x) ((cpuflags & (cpuflags_ %+ x)) != (cpuflags_ %+ x))