[x265] [PATCH 11 of 20] x86inc: Correctly warn on use of SSE2 instructions in SSE functions

[vignesh at multicorewareinc.com]

# HG changeset patch
# User Vignesh Vijayakumar
# Date 1496748795 -19800
#      Tue Jun 06 17:03:15 2017 +0530
# Node ID 3b09abdfe88576a963e07da3ddb83f7ef7c62c83
# Parent  337a5792d9cb29cc13b0a324ff0036121dc829ca
x86inc: Correctly warn on use of SSE2 instructions in SSE functions

SSE2 instructions that are XMM-implementations of pre-existing MMX/MMX2
instructions did not issue warnings when used in SSE functions. Handle
it by also checking the register type when such instructions are used.

diff -r 337a5792d9cb -r 3b09abdfe885 source/common/x86/x86inc.asm
--- a/source/common/x86/x86inc.asm	Tue Jun 06 16:44:12 2017 +0530
+++ b/source/common/x86/x86inc.asm	Tue Jun 06 17:03:15 2017 +0530
@@ -1079,6 +1079,8 @@
         %ifdef cpuname
             %if notcpuflag(%2)
                 %error use of ``%1'' %2 instruction in cpuname function: current_function
+                %elif cpuflags_%2 < cpuflags_sse && notcpuflag(sse2) && __sizeofreg > 8
+                    %error use of ``%1'' sse2 instruction in cpuname function: current_function
             %endif
         %endif
     %endif
@@ -1215,7 +1217,7 @@
 AVX_INSTR minss, sse, 1, 0, 1
 AVX_INSTR movapd, sse2
 AVX_INSTR movaps, sse
-AVX_INSTR movd
+AVX_INSTR movd, mmx
 AVX_INSTR movddup, sse3
 AVX_INSTR movdqa, sse2
 AVX_INSTR movdqu, sse2
@@ -1231,7 +1233,7 @@
 AVX_INSTR movntdqa, sse4
 AVX_INSTR movntpd, sse2
 AVX_INSTR movntps, sse
-AVX_INSTR movq
+AVX_INSTR movq, mmx
 AVX_INSTR movsd, sse2, 1, 0, 0
 AVX_INSTR movshdup, sse3
 AVX_INSTR movsldup, sse3