[x265] [PATCH 3 of 3] avx2: Remove redundant instruction in SEA integral vertical functions

jayashri at multicorewareinc.com jayashri at multicorewareinc.com
Fri Jun 16 10:56:31 CEST 2017


# HG changeset patch
# User Jayashri Murugan <jayashri at multicorewareinc.com>
# Date 1497507074 -19800
#      Thu Jun 15 11:41:14 2017 +0530
# Node ID 501946c87f2c9ab5c9de2d3f81fedcce4cce8341
# Parent  3a4f769d3f27b7e7d02e52e9acee3afa9988fbf4
avx2: Remove redundant instruction in SEA integral vertical functions

diff -r 3a4f769d3f27 -r 501946c87f2c source/common/x86/seaintegral.asm
--- a/source/common/x86/seaintegral.asm	Thu Jun 15 11:36:57 2017 +0530
+++ b/source/common/x86/seaintegral.asm	Thu Jun 15 11:41:14 2017 +0530
@@ -43,7 +43,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 
@@ -62,7 +61,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 
@@ -84,7 +82,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 
@@ -103,7 +100,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 
@@ -125,7 +121,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 
@@ -144,7 +139,6 @@
     movu    [r0], m1
     add     r0, 32
     sub     r1, 8
-    cmp     r1, 0
     jnz     .loop
     RET
 


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