[x265] Fwd: [PATCH 3 of 3] SEA motion search:integralv functions avx2 implementation
Praveen Tiwari
praveen at multicorewareinc.com
Tue May 2 16:38:04 CEST 2017
---------- Forwarded message ----------
From: <vignesh at multicorewareinc.com>
Date: Tue, May 2, 2017 at 3:16 PM
Subject: [x265] [PATCH 3 of 3] SEA motion search:integralv functions avx2
implementation
To: x265-devel at videolan.org
# HG changeset patch
# User Vignesh Vijayakumar
# Date 1493121121 -19800
# Tue Apr 25 17:22:01 2017 +0530
# Node ID e5ee88d08fcedee83efa63869a5a346c711a0e3d
# Parent 1afc127e62b4502c8f052ee989843c64b45ffc56
SEA motion search:integralv functions avx2 implementation
diff -r 1afc127e62b4 -r e5ee88d08fce source/common/CMakeLists.txt
--- a/source/common/CMakeLists.txt Fri Apr 28 11:22:29 2017 +0530
+++ b/source/common/CMakeLists.txt Tue Apr 25 17:22:01 2017 +0530
@@ -57,10 +57,10 @@
set(VEC_PRIMITIVES vec/vec-primitives.cpp ${PRIMITIVES})
source_group(Intrinsics FILES ${VEC_PRIMITIVES})
- set(C_SRCS asm-primitives.cpp pixel.h mc.h ipfilter8.h blockcopy8.h
dct8.h loopfilter.h)
+ set(C_SRCS asm-primitives.cpp pixel.h mc.h ipfilter8.h blockcopy8.h
dct8.h loopfilter.h seaintegral.h)
set(A_SRCS pixel-a.asm const-a.asm cpu-a.asm ssd-a.asm mc-a.asm
mc-a2.asm pixel-util8.asm blockcopy8.asm
- pixeladd8.asm dct8.asm)
+ pixeladd8.asm dct8.asm seaintegral.asm)
if(HIGH_BIT_DEPTH)
set(A_SRCS ${A_SRCS} sad16-a.asm intrapred16.asm ipfilter16.asm
loopfilter.asm)
else()
diff -r 1afc127e62b4 -r e5ee88d08fce source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp Fri Apr 28 11:22:29 2017
+0530
+++ b/source/common/x86/asm-primitives.cpp Tue Apr 25 17:22:01 2017
+0530
@@ -2158,6 +2158,13 @@
p.fix8Unpack = PFX(cutree_fix8_unpack_avx2);
p.fix8Pack = PFX(cutree_fix8_pack_avx2);
+ p.integral_init4v = PFX(integral4v_avx2);
+ p.integral_init8v = PFX(integral8v_avx2);
+ p.integral_init12v = PFX(integral12v_avx2);
+ p.integral_init16v = PFX(integral16v_avx2);
+ p.integral_init24v = PFX(integral24v_avx2);
+ p.integral_init32v = PFX(integral32v_avx2);
+
/* TODO: This kernel needs to be modified to work with
HIGH_BIT_DEPTH only
p.planeClipAndMax = PFX(planeClipAndMax_avx2); */
@@ -2178,6 +2185,7 @@
p.costCoeffNxN = PFX(costCoeffNxN_avx2_bmi2);
}
}
+
}
#else // if HIGH_BIT_DEPTH
@@ -3696,6 +3704,13 @@
p.fix8Unpack = PFX(cutree_fix8_unpack_avx2);
p.fix8Pack = PFX(cutree_fix8_pack_avx2);
+ p.integral_init4v = PFX(integral4v_avx2);
+ p.integral_init8v = PFX(integral8v_avx2);
+ p.integral_init12v = PFX(integral12v_avx2);
+ p.integral_init16v = PFX(integral16v_avx2);
+ p.integral_init24v = PFX(integral24v_avx2);
+ p.integral_init32v = PFX(integral32v_avx2);
+
}
#endif
}
diff -r 1afc127e62b4 -r e5ee88d08fce source/common/x86/seaintegral.asm
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/source/common/x86/seaintegral.asm Tue Apr 25 17:22:01 2017 +0530
@@ -0,0 +1,155 @@
+;**********************************************************
*******************
+;* Copyright (C) 2013-2017 MulticoreWare, Inc
+;*
+;* Authors: Jayashri Murugan <jayashri at multicorewareinc.com>
+;* Vignesh V Menon <vignesh at multicorewareinc.com>
+;*
+;* This program is free software; you can redistribute it and/or modify
+;* it under the terms of the GNU General Public License as published by
+;* the Free Software Foundation; either version 2 of the License, or
+;* (at your option) any later version.
+;*
+;* This program is distributed in the hope that it will be useful,
+;* but WITHOUT ANY WARRANTY; without even the implied warranty of
+;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;* GNU General Public License for more details.
+;*
+;* You should have received a copy of the GNU General Public License
+;* along with this program; if not, write to the Free Software
+;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02111,
USA.
+;*
+;* This program is also available under a commercial proprietary license.
+;* For more information, contact us at license @ x265.com.
+;**********************************************************
*******************/
+
+%include "x86inc.asm"
+%include "x86util.asm"
+
+SECTION .text
+
+;----------------------------------------------------------
-------------------
+;void integral_init4v_c(uint32_t *sum4, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral4v, 2, 4, 2
+
+ mov r2, 0
xor will be faster method of clearing a register.
+ mov r3, r1
What are possible values of stride here, is it random number or multiple
of a specific number?
+ shl r3, 4
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
+
+;----------------------------------------------------------
-------------------
+;void integral_init8v_c(uint32_t *sum8, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral8v, 2, 4, 2
+ mov r2, 0
+ mov r3, r1
+ shl r3, 5
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
+
+;----------------------------------------------------------
-------------------
+;void integral_init12v_c(uint32_t *sum12, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral12v, 2, 5, 2
+ mov r2, 0
+ mov r3, r1
+ mov r4, r1
+ shl r3, 5
+ shl r4, 4
+ add r3, r4
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
+
+;----------------------------------------------------------
-------------------
+;void integral_init16v_c(uint32_t *sum16, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral16v, 2, 4, 2
+ mov r2, 0
+ mov r3, r1
+ shl r3, 6
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
+
+;----------------------------------------------------------
-------------------
+;void integral_init24v_c(uint32_t *sum24, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral24v, 2, 5, 2
+ mov r2, 0
+ mov r3, r1
+ mov r4, r1
+ shl r3, 6
+ shl r4, 5
+ add r3, r4
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
+
+;----------------------------------------------------------
-------------------
+;void integral_init32v_c(uint32_t *sum32, intptr_t stride)
+;----------------------------------------------------------
-------------------
+INIT_YMM avx2
+cglobal integral32v, 2, 4, 2
+ mov r2, 0
+ mov r3, r1
+ shl r3, 7
+
+.loop:
+ movu m0, [r0]
+ movu m1, [r0 + r3]
+ psubd m0, m1, m0
+ movu [r0], m0
+ add r2, 8
+ add r0, 32
+ cmp r2, r1
+ jl .loop
+ RET
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