[x265] [PATCH 204 of 307] x86: AVX512 interp_8tap_vert_pp_64xN

mythreyi at multicorewareinc.com mythreyi at multicorewareinc.com
Sat Apr 7 04:33:22 CEST 2018


# HG changeset patch
# User Vignesh Vijayakumar<vignesh at multicorewareinc.com>
# Date 1511785721 -19800
#      Mon Nov 27 17:58:41 2017 +0530
# Node ID 8abe9a2bb0f1290db65c73416fd01fcf21465460
# Parent  3de532ebcd766f11661ca023e144e8db0db9cd56
x86: AVX512 interp_8tap_vert_pp_64xN

Size  |  AVX2 performance  | AVX512 performance
----------------------------------------------
64x16 |       24.38x       |      44.12x
64x32 |       24.75x       |      45.25x
64x48 |       25.05x       |      45.17x
64x64 |       24.63x       |      45.29x

diff -r 3de532ebcd76 -r 8abe9a2bb0f1 source/common/x86/asm-primitives.cpp
--- a/source/common/x86/asm-primitives.cpp	Mon Nov 27 15:38:21 2017 +0530
+++ b/source/common/x86/asm-primitives.cpp	Mon Nov 27 17:58:41 2017 +0530
@@ -4983,6 +4983,11 @@
         p.pu[LUMA_64x32].luma_vss = PFX(interp_8tap_vert_ss_64x32_avx512);
         p.pu[LUMA_64x16].luma_vss = PFX(interp_8tap_vert_ss_64x16_avx512);
 
+        p.pu[LUMA_64x64].luma_vpp = PFX(interp_8tap_vert_pp_64x64_avx512);
+        p.pu[LUMA_64x48].luma_vpp = PFX(interp_8tap_vert_pp_64x48_avx512);
+        p.pu[LUMA_64x32].luma_vpp = PFX(interp_8tap_vert_pp_64x32_avx512);
+        p.pu[LUMA_64x16].luma_vpp = PFX(interp_8tap_vert_pp_64x16_avx512);
+
         p.cu[BLOCK_8x8].dct = PFX(dct8_avx512);
         p.cu[BLOCK_8x8].idct = PFX(idct8_avx512);
         p.cu[BLOCK_16x16].idct = PFX(idct16_avx512);
diff -r 3de532ebcd76 -r 8abe9a2bb0f1 source/common/x86/ipfilter8.asm
--- a/source/common/x86/ipfilter8.asm	Mon Nov 27 15:38:21 2017 +0530
+++ b/source/common/x86/ipfilter8.asm	Mon Nov 27 17:58:41 2017 +0530
@@ -213,6 +213,27 @@
                                         times 16 dw 58, -10
                                         times 16 dw 4, -1
 
+ALIGN 64
+const tab_LumaCoeffVer_32_avx512,       times 32 db 0, 0
+                                        times 32 db 0, 64
+                                        times 32 db 0, 0
+                                        times 32 db 0, 0
+
+                                        times 32 db -1, 4
+                                        times 32 db -10, 58
+                                        times 32 db 17, -5
+                                        times 32 db 1, 0
+
+                                        times 32 db -1, 4
+                                        times 32 db -11, 40
+                                        times 32 db 40, -11
+                                        times 32 db 4, -1
+
+                                        times 32 db 0, 1
+                                        times 32 db -5, 17
+                                        times 32 db 58, -10
+                                        times 32 db 4, -1
+
 const tab_c_64_n64, times 8 db 64, -64
 
 const interp8_hps_shuf,     dd 0, 4, 1, 5, 2, 6, 3, 7
@@ -13860,5 +13881,131 @@
 ;avx512 luma_vss code end
 ;-------------------------------------------------------------------------------------------------------------
 ;-------------------------------------------------------------------------------------------------------------
+;avx512 luma_vpp code start
+;-------------------------------------------------------------------------------------------------------------
+%macro PROCESS_LUMA_VERT_PP_64x2_AVX512 0
+    lea                   r5,                 [r0 + 4 * r1]
+    movu                  m1,                 [r0]
+    movu                  m3,                 [r0 + r1]
+    punpcklbw             m0,                 m1,                  m3
+    pmaddubsw             m0,                 m8
+    punpckhbw             m1,                 m3
+    pmaddubsw             m1,                 m8
+
+    movu                  m4,                 [r0 + 2 * r1]
+    punpcklbw             m2,                 m3,                  m4
+    pmaddubsw             m2,                 m8
+    punpckhbw             m3,                 m4
+    pmaddubsw             m3,                 m8
+
+    movu                  m5,                 [r0 + r6]
+    punpcklbw             m6,                 m4,                  m5
+    pmaddubsw             m6,                 m9
+    punpckhbw             m4,                 m5
+    pmaddubsw             m4,                 m9
+
+    paddw                 m0,                 m6
+    paddw                 m1,                 m4
+
+    movu                  m4,                 [r0 + 4 * r1]
+    punpcklbw             m6,                 m5,                  m4
+    pmaddubsw             m6,                 m9
+    punpckhbw             m5,                 m4
+    pmaddubsw             m5,                 m9
+
+    paddw                 m2,                 m6
+    paddw                 m3,                 m5
+
+    movu                  m15,                [r5 + r1]
+    punpcklbw             m12,                m4,                  m15
+    pmaddubsw             m12,                m10
+    punpckhbw             m13,                m4,                  m15
+    pmaddubsw             m13,                m10
+
+    movu                  m4,                 [r5 + 2 * r1]
+    punpcklbw             m14,                m15,                 m4
+    pmaddubsw             m14,                m10
+    punpckhbw             m15,                m4
+    pmaddubsw             m15,                m10
+
+    movu                  m5,                 [r5 + r6]
+    punpcklbw             m6,                 m4,                  m5
+    pmaddubsw             m6,                 m11
+    punpckhbw             m4,                 m5
+    pmaddubsw             m4,                 m11
+
+    paddw                 m12,                m6
+    paddw                 m13,                m4
+
+    movu                  m4,                 [r5 + 4 * r1]
+    punpcklbw             m6,                 m5,                  m4
+    pmaddubsw             m6,                 m11
+    punpckhbw             m5,                 m4
+    pmaddubsw             m5,                 m11
+
+    paddw                 m14,                m6
+    paddw                 m15,                m5
+
+    paddw                 m0,                 m12
+    paddw                 m1,                 m13
+    paddw                 m2,                 m14
+    paddw                 m3,                 m15
+
+    pmulhrsw              m0,                 m7
+    pmulhrsw              m1,                 m7
+    pmulhrsw              m2,                 m7
+    pmulhrsw              m3,                 m7
+
+    packuswb              m0,                 m1
+    packuswb              m2,                 m3
+    movu                  [r2],               m0
+    movu                  [r2 + r3],          m2
+%endmacro
+
+;-----------------------------------------------------------------------------------------------------------------
+; void interp_4tap_vert(int16_t *src, intptr_t srcStride, int16_t *dst, intptr_t dstStride, int coeffIdx)
+;-----------------------------------------------------------------------------------------------------------------
+%macro FILTER_VER_PP_LUMA_64xN_AVX512 1
+INIT_ZMM avx512
+cglobal interp_8tap_vert_pp_64x%1, 5, 8, 16
+    mov                   r4d,                r4m
+    shl                   r4d,                8
+    lea                   r6,                 [3 * r1]
+    lea                   r7,                 [3 * r3]
+    sub                   r0,                 r6
+
+%ifdef PIC
+    lea                   r5,                 [tab_LumaCoeffVer_32_avx512]
+    mova                  m8,                 [r5 + r4]
+    mova                  m9,                 [r5 + r4 + 1 * mmsize]
+    mova                  m10,                [r5 + r4 + 2 * mmsize]
+    mova                  m11,                [r5 + r4 + 3 * mmsize]
+%else
+    mova                  m8,                 [tab_LumaCoeffVer_32_avx512 + r4]
+    mova                  m9,                 [tab_LumaCoeffVer_32_avx512 + r4 + 1 * mmsize]
+    mova                  m10,                [tab_LumaCoeffVer_32_avx512 + r4 + 2 * mmsize]
+    mova                  m11,                [tab_LumaCoeffVer_32_avx512 + r4 + 3 * mmsize]
+%endif
+
+    vbroadcasti32x8       m7,                 [pw_512]
+%rep %1/2 - 1
+    PROCESS_LUMA_VERT_PP_64x2_AVX512
+    lea                   r0,                 [r0 + 2 * r1]
+    lea                   r2,                 [r2 + 2 * r3]
+%endrep
+    PROCESS_LUMA_VERT_PP_64x2_AVX512
+    RET
+%endmacro
+
+%if ARCH_X86_64
+FILTER_VER_PP_LUMA_64xN_AVX512 16
+FILTER_VER_PP_LUMA_64xN_AVX512 32
+FILTER_VER_PP_LUMA_64xN_AVX512 48
+FILTER_VER_PP_LUMA_64xN_AVX512 64
+%endif
+;-------------------------------------------------------------------------------------------------------------
+;avx512 luma_vpp code end
+;-------------------------------------------------------------------------------------------------------------
+;-------------------------------------------------------------------------------------------------------------
 ;ipfilter_luma_avx512 code end
 ;-------------------------------------------------------------------------------------------------------------
\ No newline at end of file


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